SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100102313A1
• Filed: 10/20/2009
• Published: 04/29/2010
• Est. Priority Date: 10/24/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, MIYAIRI, Hidekazu, OSADA, Takeshi
• Granted Patent: US 8,067,775 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/47635 After-treatment of these layers
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.

Claims

1. A semiconductor device comprising:

a first gate electrode over an insulating surface;

a first insulating layer over the first gate electrode;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over the oxide semiconductor layer;

a second insulating layer covering the source electrode and the drain electrode;

a second gate electrode over the second insulating layer,

wherein the oxide semiconductor layer has a region whose thickness is smaller than that of a region overlapping with the source electrode or the drain electrode, and

wherein the second insulating layer is in contact with the region whose thickness is smaller in the oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein a width of the first gate electrode is larger than a width of the second gate electrode.

3. The semiconductor device according to claim 1, wherein a width of the first gate electrode is smaller than a width of the second gate electrode.

4. The semiconductor device according to claim 1, wherein a width of the first gate electrode is larger than the region whose thickness is smaller in the oxide semiconductor layer while a width of the second gate electrode is smaller than the region whose thickness is smaller in the oxide semiconductor.

10. The semiconductor device according to any one of claims 1, wherein the first gate electrode and the second gate electrode have the same potential.

5. A semiconductor device comprising:

a pixel portion; and

a driver circuit,

wherein the pixel portion includes at least a first thin film transistor having a first oxide semiconductor layer,

wherein the driver circuit includes an EDMOS circuit including at least a second thin film transistor having a second oxide semiconductor layer and a third thin film transistor having a third oxide semiconductor layer,

wherein the third thin film transistor includes a first gate electrode below the third oxide semiconductor layer and a second gate electrode above the third oxide semiconductor layer,

wherein the third oxide semiconductor layer has a region whose thickness is smaller than that of a region overlapping with the source electrode or the drain electrode, and

wherein the second thin film transistor is one of an enhancement type transistor and a depletion type transistor and the third thin film transistor is the other of the enhancement type transistor and the depletion type transistor.

6. The semiconductor device according to claim 5, wherein the first thin film transistor is electrically connected to a pixel electrode, and the pixel electrode is formed using the same material as the second gate electrode.

7. The semiconductor device according to claim 5, wherein the first thin film transistor is electrically connected to a pixel electrode, and the pixel electrode is formed using a different material from the second gate electrode.

8. The semiconductor device according to any one of claims 5, wherein the third oxide semiconductor layer overlaps with the first gate electrode with the first insulating layer therebetween and overlaps with the second gate electrode with the second insulating layer therebetween, and the second insulating layer is in contact with the region whose thickness is smaller in the oxide semiconductor layer.

9. The semiconductor device according to any one of claims 5, wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer include at least one selected from the group consisting of indium, gallium, and zinc.

11. The semiconductor device according to any one of claims 5, wherein the first gate electrode and the second gate electrode have different potentials.