TRENCH GATE TYPE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

• US 20100102382A1
• Filed: 09/26/2008
• Published: 04/29/2010
• Est. Priority Date: 09/28/2007
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Tabe, Tomonori, Fujita, Kazunori, Shimada, Satoru, Yamaoka, Yoshikazu
• Granted Patent: US 8,076,720 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The invention provides a trench gate type transistor in which the gate leakage current is prevented and the gate capacitance is reduced. A trench is formed in an N− type semiconductor layer. A thin silicon oxide film is formed on a region of the N− type semiconductor layer for the active region of the transistor in the trench. On the other hand, a silicon oxide film which is thicker than the silicon oxide film is formed on a region not for the active region. Furthermore, a leading portion extending from inside the trench onto the outside thereof forms a gate electrode contacting the silicon oxide film. This provides a long distance between the gate electrode at the leading portion and the corner portion of the N− type semiconductor layer, thereby preventing the gate leakage current and reducing the gate capacitance.

Claims

1. A trench gate type transistor comprising;

a semiconductor layer having a trench formed therein;

a gate insulation film disposed in the trench and extending outside the trench so as to overlie a top surface of the semiconductor layer;

a gate electrode disposed on the gate insulation film; and

a body layer formed in the semiconductor layer so as to be in contact with the gate insulation film on a sidewall of the trench,

the gate insulation film comprising a first gate insulation film having a first thickness in a portion in contact with the body layer and a second gate insulation film having a second thickness larger than the first thickness in a portion covering a top edge portion of the trench where the sidewall of the trench and the top surface of the semiconductor layer meet.

2. The trench gate type transistor of claim 1, wherein the second gate insulation film is round at the top edge portion so as not to have an apex portion in a cross section thereof.

3. The trench gate type transistor of claim 1, further comprising a high breakdown voltage MOS transistor formed on the semiconductor layer and comprising another gate insulation film made of the second gate insulation film.

4. A method of manufacturing a trench gate type transistor, comprising:

forming a trench in a semiconductor layer;

forming an oxide film on a front surface of the semiconductor layer and in the trench by thermally oxidizing the semiconductor layer;

removing the oxide film from an active region in the trench selectively;

forming a first gate oxide film having a first thickness on the active region in the trench and a second gate oxide film having a second thickness larger than the first thickness on a non-active region by thermally oxidizing the semiconductor layer after the selective removal of the oxide film;

forming a gate electrode on the first and second gate oxide films so as to occupy the trench and cover the second gate oxide film outside the trench; and

forming a body layer in the semiconductor layer along the trench so as to be in contact with the first gate oxide film.

5. The method of claim 4, wherein the formation of the oxide film comprises thermally oxidizing the semiconductor layer so as to be round at a top edge portion of the trench so as not to have an apex portion in a cross section thereof.

6. A trench gate type transistor comprising:

a semiconductor layer having a trench formed therein;

a gate insulation film disposed in the trench;

a thick insulation film disposed in an end portion of the trench so as to be in contact with the gate insulation film and having a thickness larger than the gate insulation film;

a gate electrode covering the gate insulation film in the trench and extending onto the thick insulation film; and

a body layer formed in the semiconductor layer along the trench so as to be in contact with the gate insulation film.

7. The trench gate type transistor of claim 6, wherein the thick insulation film comprises a trench insulation film for element isolation.

8. The trench gate type transistor of claim 7, wherein the trench insulation film is deeper than the trench.

9. The trench gate type transistor of claim 6, wherein the thick insulation film comprises a LOCOS oxide film.

10. A trench gate type transistor comprising:

a semiconductor layer comprising a plurality of trenches formed therein;

a gate insulation film formed in the trenches;

a thick insulation film disposed in end portions of the trenches so as to be in contact with the gate insulation film and having a thickness larger than the gate insulation film;

a plurality of gate electrodes, each of the gate electrodes covering the gate insulation film in a corresponding trench and extending onto the thick insulation film; and

a plurality of body layers formed in the semiconductor layer along the trenches so as to be in contact with the gate insulation film,

wherein the gate electrodes are physically separated from each other.

11. The trench gate type transistor of claim 10, wherein the thick insulation film is separated corresponding to the separated gate electrodes.

12. A method of manufacturing a trench gate type transistor, comprising:

forming a trench having short sides and long sides in a surface portion of a semiconductor layer;

implanting impurities into a sidewall and a bottom surface of the trench and into a front surface of a semiconductor substrate near the trench by obliquely ion-implanting the impurities in a direction of the long sides;

implanting impurities into an upper portion of the sidewall of the trench and the front surface of the semiconductor substrate near the trench by obliquely ion-implanting the impurities in a direction of the short sides;

forming a thick gate insulation film by an accelerated oxidation in portions where the impurities are implanted; and

forming a gate electrode so as to occupy the trench and cover the thick gate insulation film outside the trench.

13. The method of claim 12, wherein the impurities comprise argon.