ELECTRONIC CIRCUIT AND METHOD FOR CONTROLLING A POWER FIELD EFFECT TRANSISTOR
First Claim
1. An electronic circuit, comprising:
- a power field effect transistor (FET) including a semiconductor body, the semiconductor body including a drain zone, a drift zone, a source zone and a bulk zone, the power FET further including a gate and a field plate, the field plate being placed adjacent to the drift zone and being insulated from the drift zone;
a switch circuitry for electrically connecting the field plate dependent on the drain-source voltage UDS and a predetermined voltage UT, such thatthe field plate is electrically connected to the drain zone if |UDS|<
UT, andif |UDS|>
UT, the field plate is electrically connected to an electrode having an electrode-source voltage UES between the electrode and the source with |UES|<
|UDS|.
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Accused Products
Abstract
An electronic circuit and a method for controlling a power field effect transistor. The electronic circuit comprises a power field effect transistor having a semiconductor body, which has a drain zone, a drift zone, a source zone and a bulk zone. The power field effect transistor further comprises a gate and a field plate. The field plate is placed adjacent to the drift zone and is isolated from the drift zone. A switch circuitry is provided for electrically connecting the field plate depending on the drain-source voltage such that the field plate is electrically connected to the drain zone, if |UDS|>UT, where UT is a predetermined voltage, and if |UDS|>UT, the field plate is connected to an electrode having an electrode-source voltage UES.
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Citations
21 Claims
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1. An electronic circuit, comprising:
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a power field effect transistor (FET) including a semiconductor body, the semiconductor body including a drain zone, a drift zone, a source zone and a bulk zone, the power FET further including a gate and a field plate, the field plate being placed adjacent to the drift zone and being insulated from the drift zone; a switch circuitry for electrically connecting the field plate dependent on the drain-source voltage UDS and a predetermined voltage UT, such that the field plate is electrically connected to the drain zone if |UDS|<
UT, andif |UDS|>
UT, the field plate is electrically connected to an electrode having an electrode-source voltage UES between the electrode and the source with |UES|<
|UDS|. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for controlling a power FET (field effect transistor), the power FET including a semiconductor body having a drain zone, a drift zone, a source zone and a bulk zone, the power FET further including a gate and a field plate, the field plate situated adjacent to the drift zone and being insulated from the drift zone, the method comprising:
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connecting the field plate to the drain zone if |UDS|<
UT, where UT is a predetermined voltage; andif |UDS|>
UT, connecting the field plate to an electrode having an electrode-source voltage UES between the electrode and the source with |UES|<
|UDS|. - View Dependent Claims (19, 20, 21)
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Specification