TUNING A VARIABLE RESISTANCE OF A RESISTIVE SENSE ELEMENT

• US 20100103717A1
• Filed: 07/06/2009
• Published: 04/29/2010
• Est. Priority Date: 10/27/2008
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Lee, Brian S., Bowman, Rod, Xi, Haiwen, Ryan, Patrick J.
• Granted Patent: US 8,289,748 B2
• Time in Patent Office: Days
• US Class Current: 365/148
• CPC Class Codes: G11C 11/22 using ferroelectric elements
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0073 Write using bi-directional cell biasing
• CPC Class Codes: G11C 2207/2254 Calibration
• CPC Class Codes: G11C 2213/31 Material having complex metal oxide, e.g. perovskite structure
• CPC Class Codes: G11C 29/02 Detection or location of defective auxiliary circuits, e.g. defective refresh counters
• CPC Class Codes: G11C 29/026 in sense amplifiers
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50008 of impedance
• CPC Class Codes: G11C 7/06 Sense amplifiers; Associated circuits , e.g. timing or triggering circuits

Abstract

Method and apparatus for tuning a variable resistance resistive sense element of an electronic device. In some embodiments, a value indicative of a selected number of consecutive pulses is stored in a memory location and a resistive sense element (RSE) is set to a baseline RSE resistance. A tuning operation is performed by applying the selected number of consecutive pulses to the RSE to tune the baseline RSE resistance to a final adjusted resistance.

Claims

1. A method comprising:

storing a value indicative of a selected number of consecutive pulses in a memory location for a subsequent tuning operation;

setting a resistive sense element (RSE) to a baseline RSE resistance; and

performing the tuning operation by applying the selected number of consecutive pulses to the RSE to tune the baseline RSE resistance to a final adjusted resistance.

2. The method of claim 1, wherein a count is incremented for every consecutive pulse.

3. The method of claim 2, wherein an error flag is issued if the count reaches a predetermined number.

4. The method of claim 2, wherein the count resets upon failing to be verified within a predetermined resistance range.

5. The method of claim 1, wherein the final adjusted resistance is verified after being tuned.

6. The method of claim 1, wherein the final adjusted resistance is verified between a predetermined maximum value and a predetermined minimum value.

7. The method of claim 1, wherein the RSE is tested multiple times for compliance with a predetermined resistance minimum value and a predetermined resistance maximum value.

8. The method of claim 1, wherein the selected number of consecutive pulses is applied multiple times to the RSE in order to reach the final adjusted resistance.

9. The method of claim 1, wherein the RSE comprises a perovskite complex oxide between a top electrode and a bottom electrode.

10. The method of claim 9, wherein the top electrode and bottom electrode are formed of dissimilar materials.

11. An apparatus comprising control circuitry capable of storing a value indicative of a selected number of consecutive pulses in a memory location for a subsequent tuning operation, setting a resistive sense element (RSE) to a baseline RSE resistance, and performing the tuning operation by applying the selected number of consecutive pulses to the RSE to tune the baseline RSE resistance to a final adjusted resistance.

12. The apparatus of claim 11, wherein the baseline RSE resistance a low resistance state.

13. The apparatus of claim 11, wherein the baseline RSE resistance a high resistance state.

14. The apparatus of claim 11, wherein the selected number of pulses is repeatedly retrieved from the memory location during the performance step.

15. The apparatus of claim 11, wherein the pulses induce non-linear incremental changes in said resistance.

16. The apparatus of claim 11, wherein the RSE is used for impedance matching of a port of a circuit.

17. The apparatus of claim 11, wherein the RSE is used for electro-Static Discharge protection of a port of a circuit.

18. The apparatus of claim 11, wherein the RSE is tested to set a final adjusted resistance.

19. The apparatus of claim 11, wherein the RSE comprises a perovskite complex oxide disposed between a top electrode and a bottom electrode.

20. The apparatus of claim 19, wherein the top electrode and bottom electrode are formed of dissimilar materials.