METHOD AND SYSTEM FOR PERFORMING TWO-DIMENSIONAL TRANSFORM ON DATA VALUE ARRAY WITH REDUCED POWER CONSUMPTION

• US 20100104008A1
• Filed: 12/30/2009
• Published: 04/29/2010
• Est. Priority Date: 08/25/2006
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Sriram, Partha, Bulusu, Ravi
• Granted Patent: US 8,666,166 B2
• Time in Patent Office: Days
• US Class Current: 375/240.200
• CPC Class Codes: G06F 17/145 Square transforms, e.g. Hadamard, Walsh, Haar, Hough, Slant transforms
• CPC Class Codes: G06F 17/147 Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform G06F17/145 takes precedence

Abstract

A method and system for performing a 2D transform is disclosed. The 2D transform may include a row transform and/or a column transform. When performing the row or column transform, it may be determined whether each of different subsets of the data values including a partition of a row or column includes at least one zero value, whether each of different subsets of a first subset of the partition includes at least one zero value, and whether each of different subsets of at least one other subset of the partition includes at least one zero value. When performing the row or column transform, at least one transformation operation on at least one zero value may be bypassed or performed in a reduced-power manner, where such transformation operation would otherwise be performed in a manner consuming full power if the zero value were a non-zero value.

Claims

1. A system comprising:

a first component operable to process encoded video data to generate first data;

a second component coupled to said first component and operable to process said first data to generate third data;

a third component coupled to said second component and operable to process said third data to generate decoded video data; and

wherein said second component further comprises;

row transform circuitry configured to perform a row transform on first data to generate second data;

column transform circuitry configured to perform a column transform on said second data to generate third data; and

wherein said row transform circuitry is configured to determine whether a first portion of a row of said first data comprises at least one zero value,

wherein said row transform circuitry is further configured to determine whether a second portion of said row comprises at least one zero value, and

wherein said row transform circuitry is further configured to perform, when performing said row transform, an operation associated with at least one data value comprising a zero value, wherein said at least one data value is selected from a group consisting of at least one data value of said first portion of said row and at least one data value of said second portion of said row.

2. The system of claim 1, wherein said operation comprises bypassing at least one transformation operation.

3. The system of claim 1, wherein said operation comprises performing, in a reduced-power manner, at least one transformation operation on said at least one data value comprising a zero value.

4. The system of claim 3, wherein said at least one transformation operation comprises a multiplication operation.

5. The system of claim 1 further comprising:

a buffer coupled to said row transform circuitry and said column transform circuitry, wherein said row transform circuitry is configured to store said second data in said buffer, and wherein said column transform circuitry is configured to access said second data from said buffer.

6. The system of claim 1, wherein said row transform circuitry is configured to reorder data values of said first data when performing said row transform.

7. The system of claim 1, wherein said row transform and said column transform are associated with an inverse discrete cosine transform.

8. A system comprising:

a first component operable to process encoded video data to generate first data;

a second component coupled to said first component and operable to process said first data to generate third data;

a third component coupled to said second component and operable to process said third data to generate decoded video data; and

wherein said second component further comprises;

column transform circuitry configured to perform a column transform on first data to generate second data;

row transform circuitry configured to perform a row transform on said second data to generate third data; and

wherein said column transform circuitry is configured to determine whether a first portion of a column of said first data comprises at least one zero value,

wherein said column transform circuitry is further configured to determine whether a second portion of said column comprises at least one zero value, and

wherein said column transform circuitry is further configured to perform, when performing said column transform, an operation associated with at least one data value comprising a zero value, wherein said at least one data value is selected from a group consisting of at least one data value of said first portion of said column and at least one data value of said second portion of said column.

9. The system of claim 8, wherein said operation comprises bypassing at least one transformation operation.

10. The system of claim 8, wherein said operation comprises performing, in a reduced-power manner, at least one transformation operation on said at least one data value comprising a zero value.

11. The system of claim 10, wherein said at least one transformation operation comprises a multiplication operation.

12. The system of claim 8 further comprising:

a buffer coupled to said row transform circuitry and said column transform circuitry, wherein said column transform circuitry is configured to store said second data in said buffer, and wherein said row transform circuitry is configured to access said second data from said buffer.

13. The system of claim 8, wherein said column transform circuitry is configured to reorder data values of said first data when performing said column transform.

14. The system of claim 8, wherein said row transform and said column transform are associated with an inverse discrete cosine transform.

15. A method comprising:

processing encoded video data to generate first data;

processing said first data to generate third data, wherein said processing said first data further comprises;

performing a row transform on first data to generate second data;

performing a column transform on said second data to generate third data; and

wherein said performing said row transform further comprises;

determining whether a first portion of a row of said first data comprises at least one zero value;

determining whether a second portion of said row comprises at least one zero value; and

performing an operation associated with at least one data value comprising a zero value, wherein said at least one data value is selected from a group consisting of at least one data value of said first portion of said row and at least one data value of said second portion of said row; and

processing said third data to generate decoded video data.

16. The method of claim 15, wherein said operation comprises bypassing at least one transformation operation.

17. The method of claim 15, wherein said performing said operation further comprises performing, in a reduced-power manner, at least one transformation operation on said at least one data value comprising a zero value.

18. The method of claim 17, wherein said at least one transformation operation comprises a multiplication operation.

19. The method of claim 15 further comprising:

storing said second data in a buffer after said performing said row transform; and

accessing said second data from said buffer before performing said column transform.

20. The method of claim 15, wherein said performing said row transform further comprises reordering data values of said first data.

21. The method of claim 15, wherein said row transform and said column transform are associated with an inverse discrete cosine transform.

22. A method comprising:

processing encoded video data to generate first data;

processing said first data to generate third data, wherein said processing said first data further comprises;

performing a column transform on first data to generate second data;

performing a row transform on said second data to generate third data; and

wherein said performing said column transform further comprises;

determining whether a first portion of a column of said first data comprises at least one zero value;

determining whether a second portion of said column comprises at least one zero value; and

performing an operation associated with at least one data value comprising a zero value, wherein said at least one data value is selected from a group consisting of at least one data value of said first portion of said column and at least one data value of said second portion of said column; and

processing said third data to generate decoded video data.

23. The method of claim 22, wherein said operation comprises bypassing at least one transformation operation.

24. The method of claim 22, wherein said performing said operation further comprises performing, in a reduced-power manner, at least one transformation operation on said at least one data value comprising a zero value.

25. The method of claim 24, wherein said at least one transformation operation comprises a multiplication operation.

26. The method of claim 22 further comprising:

storing said second data in a buffer after said performing said column transform; and

accessing said second data from said buffer before performing said row transform.

27. The method of claim 22, wherein said performing said column transform further comprises reordering data values of said first data.

28. The method of claim 22, wherein said row transform and said column transform are associated with an inverse discrete cosine transform.