×

Cache controller and cache controlling method

  • US 20100107038A1
  • Filed: 12/18/2009
  • Published: 04/29/2010
  • Est. Priority Date: 06/20/2007
  • Status: Active Grant
First Claim
Patent Images

1. A cache memory controller comprising:

  • a data detecting unit that detects a write address in the cache memory into which the store data is stored, an area-to-be-stored of the store data that is to be stored and an area-not-to-be-stored that is not to be stored, when the store data is transmitted from an execution unit;

    a data determining unit that determines whether data-to-be-stored that is already written is present in the write address detected by the data detecting unit;

    an existing data-not-to-be-stored obtaining unit that obtains, from the data written in the write address, data detected by the data detecting unit and written in the area-not-to-be-stored, as existing data-not-to-be-stored, when the data determining unit determines that the data-to-be-stored is present in the write address;

    a store data writing unit that merges the existing data-not-to-be-stored obtained by the existing data-not-to-be-stored obtaining unit with the data-to-be-stored in the area-to-be-stored detected by the data detecting unit to generate new store data, and writes the new store data into the write address detected by the data detecting unit; and

    an ECC generating unit that generates an ECC for the new store data written by the store data writing unit into the cache memory, from the new store data generated by the store data writing unit.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×