SOLID-STATE IMAGING DEVICE, PIXEL-SIGNAL PROCESSING METHOD, ANALOG-SIGNAL TRANSFERRING DEVICE, AND ANALOG-SIGNAL TRANSFERRING METHOD
First Claim
1. A solid-state imaging device comprising:
- an imaging pixel region where a plurality of imaging pixels is disposed;
a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns;
charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns;
holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and
a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line,wherein,the charge integrating amps have feedback capacitors implemented by variable capacitors.
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Abstract
From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.
24 Citations
4 Claims
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1. A solid-state imaging device comprising:
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an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line, wherein, the charge integrating amps have feedback capacitors implemented by variable capacitors.
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2. A solid-state imaging device comprising:
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an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; a plurality of horizontal signal lines; a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines; and a multiplexer for sequentially selecting the plurality of horizontal signal lines to generate serial data including output pixel signals based on the pixel signals transferred by the plurality of horizontal signal lines, wherein, shielding lines that are based on a reference potential of the multiplexer are provided between the plurality of horizontal signal lines.
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3. A solid-state imaging device comprising:
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an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; a plurality of horizontal signal lines; a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines; a multiplexer for sequentially selecting the plurality of horizontal signal lines to generate serial data including output pixel signals based on the pixel signals transferred by the plurality of horizontal signal lines; and a reference-potential generating unit for generating a reference potential based on a black level of the pixel signals output through the horizontal signal lines, wherein the reference potential is used as a reference potential for an output amp of the multiplexer.
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4. A solid-state imaging device comprising:
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an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; a plurality of horizontal signal lines; and a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines, wherein, the amps are charge integrating amps, the charge integrating amps having feedback capacitors implemented by variable capacitors.
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Specification