Cancellation of burst noise in a communication system with application to S-CDMA

• US 20100111141A1
• Filed: 01/04/2010
• Published: 05/06/2010
• Est. Priority Date: 08/31/1999
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Yousef, Nabil R., Kolze, Thomas J., Currivan, Bruce J., Ungerboeck, Gottfried
• Granted Patent: US 8,411,769 B2
• Time in Patent Office: Days
• US Class Current: 375/144
• CPC Class Codes: H04B 1/71 the interference being narrowband interference
• CPC Class Codes: H04B 1/7107 Subtractive interference cancellation
• CPC Class Codes: H04B 7/216 Code division or spread-spectrum multiple access [CDMA, SSMA]
• CPC Class Codes: H04J 13/0003 Code application, i.e. aspects relating to how codes are applied to form multiplexed channels
• CPC Class Codes: H04J 13/16 Code allocation
• CPC Class Codes: H04L 2025/03375 Passband transmission
• CPC Class Codes: H04L 2025/03477 not time-recursive
• CPC Class Codes: H04L 25/03038 with a non-recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 25/49 using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems spectral shaping H04L25/03828
• CPC Class Codes: H04L 27/3405 Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power

Abstract

A communication system performs burst noise cancellation. A transmitter produces and transmits a spread signal that comprises at least one known-value symbol spread by a plurality of non data-carrying orthogonal codes and data symbols spread by at least one data-carrying orthogonal code. The transmitter transmits the spread signal across a communication link that introduces burst noise. A burst noise detector determines burst noise affected chips of the orthogonal codes. A weight computation functional block calculates a plurality of complex-valued combining weights based upon the burst noise affected chips. A vector de-spreader and a linear combiner operate in combination to use the plurality of non data-carrying orthogonal codes, the at least one data-carrying orthogonal code, and the plurality of complex-valued combining weights to de-spread the received spread signal to produce the data symbols with the burst noise substantially removed.

Claims

1. An apparatus, comprising:

a linear combiner for identifying an adapted orthogonal signal component among a plurality of orthogonal signal components of a signal; and

an interference cancellation module for employing the adapted orthogonal signal component for producing a plurality of data symbols that is substantially free of interference.

2. The apparatus of claim 1, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components, time division multiple access (TDMA) signal components, code division multiple access (CDMA) signal components, or synchronous code division multiple access (S-CDMA) signal components.

3. The apparatus of claim 1, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component including impulse or burst noise.

4. The apparatus of claim 1, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using spread-spectrum signaling.

5. The apparatus of claim 1, wherein:

the plurality of orthogonal signal components of the signal including spread-spectrum signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using orthogonal frequency division multiplexing (OFDM) signaling.

6. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying orthogonal signal components using a predetermined plurality of combining weights thereby generating a plurality of scaled non-data-carrying orthogonal signal components; and

the linear combiner combining a data-carrying orthogonal signal component with the plurality of scaled non-data-carrying orthogonal signal components thereby generating the adapted orthogonal signal component.

7. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying orthogonal signal components using a predetermined plurality of combining weights thereby generating a plurality of scaled non-data-carrying orthogonal signal components;

the linear combiner combining a data-carrying orthogonal signal component with the plurality of scaled non-data-carrying orthogonal signal components thereby generating the adapted orthogonal signal component; and

the predetermined plurality of combining weights being based on an expected operational case.

8. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying codes using a predetermined plurality of combining weights based on interference affected chips within a chip sequence code of the signal thereby generating a plurality of scaled non-data-carrying codes; and

the linear combiner combining a data-carrying code with the plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component.

9. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively; and

the linear combiner combining a data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component.

10. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining a data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

11. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining a data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the linear combiner combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component; and

the interference cancellation module employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference.

12. The apparatus of claim 1, wherein:

the linear combiner scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining a data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the linear combiner combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component;

the interference cancellation module employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

13. The apparatus of claim 1, wherein:

the plurality of data symbols being modulated according to at least one of Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM), 8 Phase Shift Keying (8-PSK), 16 QAM, 32 QAM, 64 QAM, 128 QAM, 256 QAM, 516 QAM, and 1024 QAM.

14. The apparatus of claim 1, wherein:

the apparatus being a wireless communication device operative within a wireless local area network (WLAN).

15. The apparatus of claim 1, wherein:

the apparatus being a communication device operative within at least one of a cable modem communication system, a cellular communication system, a satellite communication system, a wireless communication system, a wired communication system, and a fiber node communication system.

16. An apparatus, comprising:

an input for receiving a signal from a communication channel;

a linear combiner for identifying an adapted orthogonal signal component among a plurality of orthogonal signal components of a signal; and

an interference cancellation module for employing the adapted orthogonal signal component for producing a plurality of data symbols that is substantially free of interference; and

a memory module for storing a plurality of combining weights; and

wherein;

the linear combiner scaling a plurality of non-data-carrying orthogonal signal components using the plurality of combining weights thereby generating a plurality of scaled non-data-carrying orthogonal signal components; and

the linear combiner combining a data-carrying orthogonal signal component with the plurality of scaled non-data-carrying orthogonal signal components thereby generating the adapted orthogonal signal component.

17. The apparatus of claim 16, wherein:

the plurality of combining weights being a first predetermined plurality of combining weights;

the memory module storing the first predetermined plurality of combining weights and a second predetermined plurality of combining weights; and

the linear combiner selecting the first predetermined plurality of combining weights from among the first predetermined plurality of combining weights and the second predetermined plurality of combining weights stored in the memory module.

18. The apparatus of claim 16, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components, time division multiple access (TDMA) signal components, code division multiple access (CDMA) signal components, or synchronous code division multiple access (S-CDMA) signal components.

19. The apparatus of claim 16, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component including impulse or burst noise.

20. The apparatus of claim 16, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using spread-spectrum signaling.

21. The apparatus of claim 16, wherein:

the plurality of orthogonal signal components of the signal including spread-spectrum signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using orthogonal frequency division multiplexing (OFDM) signaling.

22. The apparatus of claim 16, wherein:

the plurality of combining weights being a predetermined plurality of combining weights being based on an expected operational case.

23. The apparatus of claim 16, wherein:

the plurality of non-data-carrying orthogonal signal components being a plurality of non-data-carrying codes;

the data-carrying orthogonal signal component being a data-carrying code;

the linear combiner scaling the plurality of non-data-carrying codes using the plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and at least one additional plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively; and

the linear combiner combining the data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component.

24. The apparatus of claim 16, wherein:

the plurality of non-data-carrying orthogonal signal components being a plurality of non-data-carrying codes;

the data-carrying orthogonal signal component being a data-carrying code;

the linear combiner scaling the plurality of non-data-carrying codes using the plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and at least one additional plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining the data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

25. The apparatus of claim 16, wherein:

the plurality of non-data-carrying orthogonal signal components being a plurality of non-data-carrying codes;

the data-carrying orthogonal signal component being a data-carrying code;

the linear combiner scaling the plurality of non-data-carrying codes using the plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and at least one additional plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining the data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the linear combiner combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component; and

the interference cancellation module employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference.

26. The apparatus of claim 16, wherein:

the plurality of non-data-carrying orthogonal signal components being a plurality of non-data-carrying codes;

the data-carrying orthogonal signal component being a data-carrying code;

the linear combiner scaling the plurality of non-data-carrying codes using the plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and at least one additional plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

the linear combiner combining the data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the linear combiner combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component;

the interference cancellation module employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

27. The apparatus of claim 16, wherein:

the plurality of data symbols being modulated according to at least one of Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM), 8 Phase Shift Keying (8-PSK), 16 QAM, 32 QAM, 64 QAM, 128 QAM, 256 QAM, 516 QAM, and 1024 QAM.

28. The apparatus of claim 16, wherein:

the apparatus being a wireless communication device operative within a wireless local area network (WLAN).

29. The apparatus of claim 16, wherein:

the apparatus being a communication device operative within at least one of a cable modem communication system, a cellular communication system, a satellite communication system, a wireless communication system, a wired communication system, and a fiber node communication system.

30. A method, comprising:

receiving a signal from a communication channel;

identifying an adapted orthogonal signal component among a plurality of orthogonal signal components of the signal; and

within an interference cancellation module, employing the adapted orthogonal signal component for producing a plurality of data symbols that is substantially free of interference.

31. The method of claim 30, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components, time division multiple access (TDMA) signal components, code division multiple access (CDMA) signal components, or synchronous code division multiple access (S-CDMA) signal components.

32. The method of claim 30, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component including impulse or burst noise.

33. The method of claim 30, wherein:

the plurality of orthogonal signal components of the signal including orthogonal frequency division multiplexing (OFDM) signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using spread-spectrum signaling.

34. The method of claim 30, wherein:

the plurality of orthogonal signal components of the signal including spread-spectrum signal components; and

interference affecting the adapted orthogonal signal component being generated by a communication device using orthogonal frequency division multiplexing (OFDM) signaling.

35. The method of claim 30, wherein:

scaling a plurality of non-data-carrying orthogonal signal components using a predetermined plurality of combining weights thereby generating a plurality of scaled non-data-carrying orthogonal signal components; and

combining a data-carrying orthogonal signal component with the plurality of scaled non-data-carrying orthogonal signal components thereby generating the adapted orthogonal signal component.

36. The method of claim 30, wherein:

scaling a plurality of non-data-carrying orthogonal signal components using a predetermined plurality of combining weights thereby generating a plurality of scaled non-data-carrying orthogonal signal components;

combining a data-carrying orthogonal signal component with the plurality of scaled non-data-carrying orthogonal signal components thereby generating the adapted orthogonal signal component; and

the predetermined plurality of combining weights being based on an expected operational case.

37. The method of claim 30, wherein:

scaling a plurality of non-data-carrying codes using a predetermined plurality of combining weights based on interference affected chips within a chip sequence code of the signal thereby generating a plurality of scaled non-data-carrying codes; and

combining a data-carrying code with the plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component.

38. The method of claim 30, wherein:

scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively; and

combining a data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component.

39. The method of claim 30, wherein:

scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

combining a data-carrying code with the first plurality of scaled non-data-carrying codes or the second plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

40. The method of claim 30, wherein:

scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

combining a data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component; and

within the interference cancellation module, employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference.

41. The method of claim 30, wherein:

scaling a plurality of non-data-carrying codes using a first predetermined plurality of combining weights based on first interference affected chips within a chip sequence code of the signal and a second predetermined plurality of combining weights based on second interference affected chips within the chip sequence code of the signal thereby generating a first plurality of scaled non-data-carrying codes and a second plurality of scaled non-data-carrying codes, respectively;

combining a data-carrying code with the first plurality of scaled non-data-carrying codes thereby generating the adapted orthogonal signal component;

combining the data-carrying code with the second plurality of scaled non-data-carrying codes thereby generating at least one additional adapted orthogonal signal component;

within the interference cancellation module, employing the at least one additional adapted orthogonal signal component in producing the plurality of data symbols that is substantially free of interference;

the first interference affected chips corresponding to a first plurality of chips located at a beginning of the chip sequence code of the signal; and

the second interference affected chips corresponding to a second plurality of chips located at an end of the chip sequence code of the signal.

42. The method of claim 30, wherein:

the plurality of data symbols being modulated according to at least one of Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM), 8 Phase Shift Keying (8-PSK), 16 QAM, 32 QAM, 64 QAM, 128 QAM, 256 QAM, 516 QAM, and 1024 QAM.

43. The method of claim 30, wherein:

the method being performed within a wireless communication device operative within a wireless local area network (WLAN).

44. The method of claim 30, wherein:

the method being performed within a communication device operative within at least one of a cable modem communication system, a cellular communication system, a satellite communication system, a wireless communication system, a wired communication system, and a fiber node communication system.