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DEVICE AND METHOD FOR TESTING A CIRCUIT

  • US 20100114508A1
  • Filed: 11/30/2006
  • Published: 05/06/2010
  • Est. Priority Date: 11/30/2006
  • Status: Active Grant
First Claim
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1. A device, the device comprises:

  • a processor;

    an interface adapted to receive a test vector and to output a test response, wherein the test vector comprises a first group of signals that comprises idle signals and at least one information frame and a second group of signals that comprises timing signals and data signals;

    a receiver, coupled to the interface, wherein the receiver is adapted to receive the first group of signals and filter out the idle signals and at least one instruction frame delimiters to provide at least one instruction;

    wherein the processor, is coupled to the receiver;

    wherein the device is adapted to send the at least one instruction to at least one instruction buffer;

    wherein the processor is adapted to execute at least one instruction stored in the at least one instruction buffer and to respond to the second group of signals such as to provide a test response.

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