LIGHT-EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME

• US 20100117105A1
• Filed: 06/17/2008
• Published: 05/13/2010
• Est. Priority Date: 06/29/2007
• Status: Abandoned Application

• Current Assignee: Wooree E&L Co., Ltd.
• Original Assignee: Wooree Lst Co., Ltd. (Wooree E&L Co., Ltd.)
• Inventors: Park, Seoung Hwan, Ahn, Do Yeol
• Application Number:
  US12/667,141
• Publication Number:
  US 20100117105A1
• Time in Patent Office: Days
• US Class Current: 257/94
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/16 with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01L 33/26 Materials of the light emitting region
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

Disclosed are a light-emitting diode and a method for fabricating the same. The ternary or quaternary Group III-V nitride semiconductor light-emitting diode comprises a buffer layer doped with conductive impurities and developed with an orientation inclined toward the axis [1122] at an angle of 40° to 70° with respect to the axis [0001] on a [0001]-oriented substrate, a light-emitting layer arranged on the buffer layer, a first electrode arranged under the buffer layer, and a second electrode arranged on the light-emitting layer, wherein the light-emitting layer includes a first clad layer arranged on the buffer layer, an activation layer arranged on the first clad layer and a second clad layer arranged on the activation layer. According to the semiconductor light-emitting diode, the light-emitting layer is formed on the substrate with an orientation inclined toward the axis [1122] at an angle of 40° to 70° with respect to the axis [0001], and compositions of Group III-V and Group II-VI compounds constituting the first and second clad layers are controlled. As a result, it is possible to offset the stresses applied to the activation layer and prevent spontaneous polarization. As a result, the light-emitting diode can exhibit improved light efficiency.

Claims

1-49. -49. (canceled)

50. A semiconductor light emitting device, comprising:

a [0001]-oriented substrate;

a buffer layer developed with an orientation inclined toward an [1122] plane at a predetermined angle with respect to a [0001] plane on the [0001]-oriented substrate;

a light-emitting layer arranged over the buffer layer, the light-emitting layer including a first clad layer, a second clad layer and an activation layer interposed between the first clad layer and the second clad layer;

a first electrode electrically contacted with the first clad layer; and

a second electrode electrically contacted with the second clad layer.

51. The semiconductor light emitting device according to claim 50, wherein the light-emitting layer is composed of Group III-V nitride semiconductor.

52. The semiconductor light emitting device according to claim 51, wherein the predetermined angle is in a range of about 40°

to 70°

.

53. The semiconductor light emitting device according to claim 52, wherein the buffer layer is composed of any one of GaN, MN, ZnO, MgZnO and SiC.

54. The semiconductor light emitting device according to claim 52, wherein the activation layer is composed of any one of GaN and In_XGa_1-XN (0<

X<

1).

55. The semiconductor light emitting device according to claim 52, wherein the first and second clad layers are composed of any one of In_XGa_1-XN (0<

X<

0.3), Al_YGa_1-YN (0<

Y<

0.3) and In_XAl_YGa_1-X-YN (0<

X<

0.3, 0<

Y<

0.3).

56. The semiconductor light emitting device according to claim 52, wherein at least one of the first and second clad layers includes a p-type delta-doped layer.

57. The semiconductor light emitting device according to claim 50, wherein the light-emitting layer is composed of Group II-VI oxide semiconductor.

58. The semiconductor light emitting device according to claim 57, wherein the predetermined angle is in a range of about 15°

or 40°

to 70°

.

59. The semiconductor light emitting device according to claim 58, wherein the buffer layer is composed of any one of GaN, AlN, ZnO, MgZnO and SiC.

60. The semiconductor light emitting device according to claim 58, wherein the activation layer is composed of any one of ZnO and Mg_XZn_1-XO (0<

X<

1).

61. The semiconductor light emitting device according to claim 58, wherein each of the first and second clad layers is composed of any one of Mg_XZn_1-XO (0<

X<

0.33) and Cd_YMg_XZn_1-X-YO (0<

X<

0.33, 0<

Y<

0.3).

62. The semiconductor light emitting device according to claim 58, wherein at least one of the first and second clad layers includes a p-type delta-doped layer.

63. A method for fabricating a semiconductor light emitting device having a [0001]-oriented substrate;

a buffer layer;

a light-emitting layer arranged over the buffer layer, the light-emitting layer including a first clad layer, a second clad layer and an activation layer interposed between the first clad layer and the second clad layer;

a first electrode electrically contacted with the first clad layer; and

a second electrode electrically contacted with the second clad layer, the method comprising the steps of;

forming the buffer layer having an orientation inclined toward a [1122] plane at an angle of 15°

, or 40°

to 70°

with respect to a [0001] plane on the [0001]-oriented substrate;

forming the light-emitting layer on the buffer layer; and

forming the first electrode and the second electrode.

64. The method for fabricating the semiconductor light emitting device according to claim 63, wherein the step of forming the buffer layer comprises the steps of:

developing the [0001]-oriented buffer layer on the [0001]-oriented substrate;

etching or laying the buffer layer along the orientation [1122] to obtain crystal facets with the orientation [1122]; and

developing the [1122]-oriented crystal facets to form the buffer layer.

65. The method for fabricating the semiconductor light emitting device according to claim 63, wherein the step of forming the buffer layer comprises the steps of:

developing GaN or ZnO in the form of crystals with a plurality of initial orientations; and

,

selectively developing the crystals with facets inclined toward the orientation [1122] at an angle of 15°

, or 40°

to 70°

with respect to the [0001] plane.

66. The method for fabricating the semiconductor light emitting device according to claim 63, further comprising the steps of:

removing the [0001]-oriented substrate after forming the light-emitting layer on the buffer layer;

forming a first electrode under the buffer layer; and

forming a second electrode on the second clad layer.

67. The method for fabricating the semiconductor light emitting device according to claim 66, wherein the buffer layer is formed by being doped with conductive impurities.