NOISE SHAPING TIME TO DIGITAL CONVERTER

• US 20100117872A1
• Filed: 11/07/2008
• Published: 05/13/2010
• Est. Priority Date: 11/07/2008
• Status: Active Grant

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Ek, Staffan
• Granted Patent: US 7,741,917 B2
• Time in Patent Office: Days
• US Class Current: 341/50
• CPC Class Codes: G04F 10/005 Time-to-digital converters [TDC] analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60
• CPC Class Codes: H03L 2207/50 All digital phase-locked loop
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop

Abstract

According to an embodiment of a time to digital converter, the time difference between a signal of interest and a reference signal is measured by operating a digitally controlled oscillator at a first frequency during a first portion of the reference signal period and changing the operating frequency from the first frequency to a second frequency during the reference signal period as a function of the time difference between the signal of interest and the reference signal. The time to digital converter continuously counts how many signal transitions occur at an output of the digitally controlled oscillator during the reference signal period. The time difference between the signal of interest and the reference signal is estimated based on the number of signal transitions counted during the reference signal period.

Claims

1. A method of measuring a time difference between a signal of interest and a reference signal, comprising:

operating a digitally controlled oscillator (DCO) at a first frequency during a first portion of the reference signal period;

changing the operating frequency of the DCO from the first frequency to a second frequency during the reference signal period as a function of the time difference between the signal of interest and the reference signal;

continuously counting how many signal transitions occur at an output of the DCO during the reference signal period; and

estimating the time difference between the signal of interest and the reference signal based on the number of signal transitions counted during the reference signal period.

2. The method of claim 1, comprising changing the operating frequency of the DCO from the first frequency to the second frequency earlier in the reference signal period when the time difference is relatively large and later in the reference signal period when the time difference is relatively small.

3. The method of claim 1, comprising:

increasing a running count value each time a signal transition occurs at the output of the DCO over a plurality of reference signal periods;

storing the running count value accumulated during each reference signal period; and

comparing the running count values stored for consecutive reference signal periods.

4. The method of claim 1, comprising determining the first and second frequencies during a calibration mode.

5. The method of claim 4, comprising determining the first and second frequencies based on a time-averaged number of signal transitions observed at the output of the DCO during the calibration mode.

6. The method of claim 1, comprising:

generating a pulse having a width corresponding to the time difference between the signal of interest and the reference signal; and

operating the DCO at the first frequency when the pulse subsides and at the second frequency when the pulse is active.

7. The method of claim 6, comprising:

activating the pulse responsive to a rising edge transition in the signal of interest; and

terminating the pulse responsive to a rising edge transition in the reference signal.

8. The method of claim 6, comprising extending the width of the pulse by a fixed delay.

9. The method of claim 6, comprising inputting the pulse to the DCO as one or more frequency tuning bits.

10. The method of claim 1, wherein the signal of interest is an output of a digital phase-locked loop.

11. A time to digital converter, comprising:

a digitally controlled oscillator (DCO) configured to operate at a first frequency during a first portion of a period of a reference signal and change operating frequency from the first frequency to a second frequency during the reference signal period as a function of a time difference between a signal of interest and the reference signal;

a counter circuit configured to continuously count how many signal transitions occur at an output of the DCO during the reference signal period; and

an evaluation circuit configured to estimate the time difference between the signal of interest and the reference signal based on the number of signal transitions counted during the reference signal period.

12. The time to digital converter of claim 11, wherein the DCO is configured to change from the first frequency to the second frequency earlier in the reference signal period when the time difference is relatively large and later in the reference signal period when the time difference is relatively small.

13. The time to digital converter of claim 11, wherein the counter circuit is configured to increase a running count value each time a signal transition occurs at the output of the DCO over a plurality of reference signal periods and store the running count value accumulated during each reference signal period and compare the running count values stored for consecutive reference signal periods.

14. The time to digital converter of claim 11, comprising the evaluation circuit is configured to determine the first and second frequencies during a calibration mode.

15. The time to digital converter of claim 14, wherein the evaluation circuit is configured to determine the first and second frequencies based on a time-averaged number of signal transitions observed at the output of the DCO during the calibration mode.

16. The time to digital converter of claim 11, comprising a pulse generation circuit configured to generate a pulse having a width corresponding to the time difference between the signal of interest and the reference signal and wherein the DCO is configured to operate at the first frequency when the pulse subsides and at the second frequency when the pulse is active.

17. The time to digital converter of claim 16, wherein the pulse generation circuit is configured to activate the pulse responsive to a rising edge transition in the signal of interest and terminate the pulse responsive to a rising edge transition in the reference signal.

18. The time to digital converter of claim 16, wherein the pulse generation circuit is configured to extend the width of the pulse by a fixed delay.

19. The time to digital converter of claim 16, wherein the pulse is input to the DCO as one or more frequency tuning bits.

20. A digital phase-locked loop comprising the time to digital converter of claim 11.