DYNAMIC SLC/MLC BLOCKS ALLOCATIONS FOR NON-VOLATILE MEMORY
First Claim
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1. An apparatus comprising:
- a flash memory having a number of memory blocks, wherein one or more of the memory blocks can operate in at least two modes of operation, the at least two modes of operation differing in a number of states to which a cell of a respective one of the blocks can be programmed and/or erased; and
a controller configured to operate the one or more of the memory blocks in one of the two modes of operation based at least partly on at least one of an amount of the memory in use or available for use.
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Abstract
Apparatus and methods are disclosed, such as those that provide dynamic block allocations in NAND flash memory between single-level cells (SLC) and multi-level cells (MLC) based on characteristics. In one embodiment, a memory controller dynamically switches between programming and/or reprogramming blocks between SLC mode and MLC mode based on the amount of memory available for use. When memory usage is low, SLC mode is used. When memory usage is high, MLC mode is used. Dynamic block allocation allows a memory controller to obtain the performance and reliability benefits of SLC mode while retaining the space saving benefits of MLC mode.
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Citations
32 Claims
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1. An apparatus comprising:
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a flash memory having a number of memory blocks, wherein one or more of the memory blocks can operate in at least two modes of operation, the at least two modes of operation differing in a number of states to which a cell of a respective one of the blocks can be programmed and/or erased; and a controller configured to operate the one or more of the memory blocks in one of the two modes of operation based at least partly on at least one of an amount of the memory in use or available for use. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of allocating memory blocks within a flash memory, the method comprising:
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receiving data to be programmed in the flash memory; dynamically allocating a block of memory cells as a block of single-level cells or a block of multi-level cells based at least partly on at least one of an amount of the memory already in use or an amount of the memory available for use; and programming the data into the allocated block. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A method of erasing data from a logical block, the method comprising:
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determining a programming mode of an allocated block comprising data; erasing the data from the allocated block based on the programming mode; and adding an indication of the erased data to a table of available blocks. - View Dependent Claims (24, 25, 26)
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27. A method of relaxing blocks from a multi-level cell mode to a single-level cell mode:
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reading data from a block in multi-level cell mode; locating two available blocks; and writing data from the block in multi-level cell mode into the two available blocks in single-level cell mode. - View Dependent Claims (28, 29, 30, 31, 32)
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Specification