METHOD OF PRODUCING SEMICONDUCTOR DEVICE AND SOQ (SILICON ON QUARTZ) SUBSTRATE USED IN THE METHOD

• US 20100123134A1
• Filed: 11/17/2009
• Published: 05/20/2010
• Est. Priority Date: 11/18/2008
• Status: Active Grant

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Inventors: NAGATA, Toshio
• Granted Patent: US 8,242,499 B2
• Time in Patent Office: Days
• US Class Current: 257/48
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/30105 Capacitance

Abstract

A method of producing a semiconductor device includes the steps of preparing an SOQ (Silicon On Quartz) substrate in which a semiconductor layer is formed on a quartz substrate; forming a plurality of semiconductor device forming regions in the SOQ substrate; forming a crack inspection pattern in the SOQ substrate; inspecting the crack inspection pattern to detect a crack in the crack inspection pattern in a first inspection step; and inspecting the semiconductor device forming regions to detect a crack in the semiconductor device forming regions in a second inspection step when the crack is detected in the crack inspection pattern in the first inspection step.

Claims

1. A method of producing a semiconductor device, comprising the steps of:

preparing an SOQ (Silicon On Quartz) substrate in which a semiconductor layer is formed on a quartz substrate;

forming a plurality of semiconductor device forming regions in the SOQ substrate;

forming a crack inspection pattern in the SOQ substrate;

inspecting the crack inspection pattern to detect a crack in the crack inspection pattern in a first inspection step; and

inspecting the semiconductor device forming regions to detect a crack in the semiconductor device forming regions in a second inspection step when the crack is detected in the crack inspection pattern in the first inspection step.

2. The method of producing the semiconductor device according to claim 1, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said crack inspection pattern has a structure in which the crack is generated more easily than in the semiconductor device forming regions.

3. The method of producing the semiconductor device according to claim 1, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said crack inspection pattern includes a large area gate having an area larger than that of a gate to be formed in the semiconductor device forming regions, and a contact arranged adjacent to the large area gate.

4. The method of producing the semiconductor device according to claim 3, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said contact is situated at a plurality of locations arranged in a row.

5. The method of producing the semiconductor device according to claim 3, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said crack inspection pattern further includes a guard region for preventing a crack from propagating.

6. The method of producing the semiconductor device according to claim 1, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said crack inspection pattern is situated in a region different from the semiconductor device forming regions.

7. The method of producing the semiconductor device according to claim 1, wherein, in the step of forming the crack inspection pattern in the SOQ substrate, said crack inspection pattern is situated within the semiconductor device forming regions.

8. An SOQ (Silicon On Quartz) substrate comprising:

a quartz substrate;

a semiconductor layer formed on the quartz substrate;

a plurality of semiconductor device forming regions; and

a crack inspection pattern.

9. The SOQ substrate according to claim 8, wherein said crack inspection pattern has a structure in which the crack is generated more easily than in the semiconductor device forming regions.

10. The SOQ substrate according to claim 8, wherein said crack inspection pattern includes a large area gate having an area larger than that of a gate to be formed in the semiconductor device forming regions, and a contact arranged adjacent to the large area gate.

11. The SOQ substrate according to claim 10, wherein said contact is situated at a plurality of locations arranged in a row.

12. The SOQ substrate according to claim 10, wherein said crack inspection pattern further includes a guard region for preventing a crack from propagating.

13. The SOQ substrate according to claim 8, wherein said crack inspection pattern is situated in a region different from the semiconductor device forming regions.

14. The SOQ substrate according to claim 8, wherein said crack inspection pattern is situated within the semiconductor device forming regions.