SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE

• US 20100123189A1
• Filed: 11/14/2008
• Published: 05/20/2010
• Est. Priority Date: 11/14/2008
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Venkatraman, Prasad, Hossain, Zia
• Granted Patent: US 8,415,739 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0638 for preventing surface leakage due to surface inversion layer, e.g. with channel stopper channel stoppers in combination with isolation region for integrated circuits H01L21/762
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/4933 with a silicide layer contacting the silicon layer, e.g. Polycide gate with a barrier layer between the silicide and silicon layers H01L29/4941
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor component that includes an edge termination structure and a method of manufacturing the semiconductor component. A semiconductor material has a semiconductor device region and an edge termination region. One or more device trenches may be formed in the semiconductor device region and one or more termination trenches is formed in the edge termination region. A source electrode is formed in a portion of a termination trench adjacent its floor and a floating electrode termination structure is formed in the portion of the termination trench adjacent its mouth. A second termination trench may be formed in the edge termination region and a non-floating electrode may be formed in the second termination trench. Alternatively, the second termination trench may be omitted and a trench-less non-floating electrode may be formed in the edge termination region.

Claims

1. A method for manufacturing a semiconductor component, comprising:

providing a semiconductor material having first and second major surfaces;

forming at least one semiconductor device in a first region of the semiconductor material, wherein a first semiconductor device of the at least one semiconductor device has a first electrode;

forming a first termination trench in a second region of the semiconductor material, the first termination trench having sidewalls and a floor;

forming a second electrode in a first portion of the first termination trench, the second electrode electrically coupled to the first electrode and spaced apart from the sidewalls and the floor by a first dielectric material;

forming a second dielectric material over the second electrode and the sidewalls of the first termination trench; and

forming a third electrode in a second portion of the first termination trench, the third electrode electrically isolated from the second electrode by the second dielectric material.

2. The method of claim 1, wherein forming the third electrode includes forming the third electrode as a floating electrode.

3. The method of claim 1, wherein forming the first semiconductor device includes forming at least one trench Metal Oxide Semiconductor Field Effect Transistor.

4. The method of claim 3, wherein forming the at least one trench Metal Oxide Semiconductor Field Effect transistor comprises:

forming a plurality of trenches in the first region of the semiconductor material, wherein a lateral distance between adjacent trenches of the plurality of trenches in the first region and a lateral distance between the first termination trench in the second region that is adjacent to one of the plurality of first trenches in the first region are substantially the same;

forming a source electrode in each trench of the plurality of trenches in the first region;

forming a gate structure in each trench of the plurality of trenches; and

forming a drain electrode in contact with the semiconductor material.

5. The method of claim 1, wherein forming the second electrode in the first portion of the first termination trench includes forming the first dielectric material on the floor and the sidewalls of the first termination trench and forming a first electrically conductive material on the first dielectric material.

6. The method of claim 5, wherein forming the second dielectric material over the second electrode includes removing the first dielectric material from the second portion of the first termination trench to expose the sidewalls of the second portion of the first termination trench and forming polysilicon on the second dielectric material, the polysilicon serving as the second electrode.

7. The method of claim 1, further including forming a second termination trench in the second region of the semiconductor material, the second termination trench having sidewalls and a floor.

8. The method of claim 7, further including:

forming a third dielectric material on the sidewalls and the floor of the second termination trench; and

forming a fourth electrode in the second termination trench.

9. The method of claim 8, wherein forming the fourth electrode includes forming polysilicon in the second termination trench.

10. The method of claim 8, further including electrically coupling the fourth electrode to the first electrode.

11. A semiconductor component, comprising:

a semiconductor material having first and second major surfaces;

one or more device trenches extending from the first major surface into the semiconductor material, each device trench of the one or more device trenches having sidewalls and a floor;

a first termination trench extending from the first major surface into the semiconductor material;

a first layer of dielectric material disposed on the floors and portions of the sidewalls adjacent to the floors of the one or more device trenches and the first termination trench;

a device electrode in each of the one or more device trenches and a first termination electrode on the first layer of dielectric material in the first termination trench;

a second layer of dielectric material disposed on each device electrode and on the termination electrode; and

a device control electrode in each of the one or more device trenches and a second termination electrode in the first termination trench, wherein each device control electrode is electrically isolated from each device electrode by the second layer of dielectric material and the second termination electrode is electrically isolated from the first termination electrode by the second layer of dielectric material.

12. The semiconductor component of claim 11, wherein a lateral distance between first and second device trenches of the at least one device trench is substantially the same as a lateral distance between the second device trench of the at least one device trench and the first termination trench.

13. The semiconductor component of claim 11, wherein the first termination electrode is coupled to at least one of the device electrodes in each of the one or more device trenches.

14. The semiconductor component of claim 11, further including:

a second termination trench extending from the first major surface into the semiconductor material, the second termination trench having a floor and sidewalls;

a portion of the first layer of dielectric material disposed on the floor and the sidewalls of the second termination trench; and

a second termination electrode on the first layer of dielectric material in the second termination trench.

15. The semiconductor component of claim 14, wherein the second termination electrode is electrically coupled to the device electrode.

16. A semiconductor component, comprising:

a semiconductor material having a device region, a termination region, and first and second major surfaces;

a field effect transistor formed in the device region; and

a first termination structure formed in the termination region, the first termination structure comprising;

a first termination trench extending from the first major surface into the semiconductor material, the first termination trench having first and second portions;

a first layer of dielectric material on the floor and the sidewalls in the first portion of the first termination trench;

a first termination electrode on the first layer of dielectric material;

a second layer of dielectric material on the first termination electrode and on the sidewalls in the second portion of the first termination trench; and

a second termination electrode on the second layer of dielectric material.

17. The semiconductor component of claim 16, wherein the field effect transistor comprises:

one or more trenches extending from the first major surface into the semiconductor material, wherein each trench of the one or more trenches has first and second portions;

the first layer of dielectric material on the floor and the sidewalls in the first portion of each trench of the one or more trenches;

a source electrode on the first layer of dielectric material;

the second layer of dielectric material on the source electrode;

a gate dielectric material on the sidewalls in the second portion of each trench of the one or more trenches; and

a gate electrode on the gate dielectric material in each trench of the one or more trenches.

18. The semiconductor component of claim 16, wherein the second termination electrode on the second layer of dielectric material is electrically coupled to the semiconductor material.

19. The semiconductor component of claim 16, further including:

a second termination structure formed in the termination region, the second termination structure comprising;

a second termination trench extending from the first major surface into the semiconductor material;

the first layer of dielectric material on the floor and the sidewalls of the second termination trench; and

a third termination electrode on the first layer of dielectric material.

20. The semiconductor component of claim 19, wherein the third termination electrode on the first layer of dielectric material is electrically coupled to the semiconductor material.