Radio Frequency Interconnect Circuits and Techniques

• US 20100126010A1
• Filed: 01/27/2010
• Published: 05/27/2010
• Est. Priority Date: 09/21/2006
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Puzella, Angelo M., Crowder, Joseph M., Fallica, Michael C., Dupuis, Patricia S., Licciardello, Joseph A., Francis, John B.
• Granted Patent: US 8,981,869 B2
• Time in Patent Office: Days
• US Class Current: 29/852
• CPC Class Codes: H01Q 21/0087 Apparatus or processes specially adapted for manufacturing antenna arrays manufacturing waveguides H01P11/00
• CPC Class Codes: H03H 7/38 Impedance-matching networks
• CPC Class Codes: H05K 1/0251 related to vias or transitions between vias and transmission lines
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 2201/09145 Edge details
• CPC Class Codes: H05K 2201/09454 Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
• CPC Class Codes: H05K 2201/09536 Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/09718 Clearance holes
• CPC Class Codes: H05K 2201/09727 Varying width along a single conductor; Conductors or pads having different widths
• CPC Class Codes: H05K 2201/209 Auto-mechanical connection between a component and a PCB or between two PCBs
• CPC Class Codes: H05K 2203/061 of previously made multilayered subassemblies laminating only or mainly similar single-sided circuit boards H05K3/4617; laminating only or mainly similar double-sided circuit boards H05K3/462
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4623 the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards H05K3/462 takes precedence
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A multilayer circuit board assembly includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the circuit board assembly. The RF interconnects can include one or more RF matching pads which provide a mechanism for matching impedance characteristics of RF stubs to provide the RF interconnects having desired insertion loss and impedance characteristics over a desired RF operating frequency band. The RF matching pads allow the manufacture of circuit boards having RF interconnects without the need to perform any back drill and back fill operation to remove stub portions of the RF interconnects in the multilayer circuit board assembly.

Claims

1. A method of manufacturing comprising:

providing a plurality of circuit boards from which a circuit board assembly will be provided;

drilling a plurality of holes in each of the plurality of circuit boards;

plating at least some of the plurality of holes to provided a plurality of RF interconnects, at least one of the plurality of RF interconnects providing an electrical signal path between a first circuit on a first layer of a first circuit board and a first circuit on a first layer of a second different circuit board; and

providing an RF matching pad about each RF interconnect having an RF stub provided as part thereof, each of said RF matching pads electrically coupled to one corresponding RF interconnect and each of the RF matching pads for adjusting an impedance characteristic of the RF interconnect to which it is electrically coupled.

2. The method of claim 1 wherein providing an RF matching pad about each RF interconnect having an RF stub provided as part thereof, comprises providing a conductor on at least one layer of a circuit board through which the RF interconnect passes with the conductor disposed proximate the RF interconnect such that the conductor is electrically coupled to the RF interconnect and wherein the size and shape of the conductor are selected to adjust an impedance characteristic of the RF interconnect.

3. The method of claim 2, wherein at least one of said conductors is provided having a disk shape.

4. The method of claim 1, wherein providing an RF matching pad about each RF interconnect having an RF stub provided as part thereof, comprises providing a relief area in a ground plane around said RF interconnect to electrically isolate the RF interconnect from the ground plane and wherein the size and shape of the relief area are selected to adjust an impedance characteristic of the RF interconnect.

5. The method of claim 4, wherein the relief areas is provided having an annular ring shape.

6. The method of claim 1 further comprising plating at least some of the plurality of holes to provide one or more mode suppression vias in the plurality of circuit boards to electrically isolate the RF interconnects from surrounding circuitry.