HIGH-SENSITIVITY Z-AXIS VIBRATION SENSOR AND METHOD OF FABRICATING THE SAME

• US 20100132467A1
• Filed: 07/24/2009
• Published: 06/03/2010
• Est. Priority Date: 12/03/2008
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Yu, Byoung Gon, Choi, Chang Auck, Ko, Sang Choon, Jun, Chi Hoon
• Granted Patent: US 8,263,426 B2
• Time in Patent Office: Days
• US Class Current: 73/514.320
• CPC Class Codes: G01H 11/06 by electric means
• CPC Class Codes: G01P 1/023 for acceleration measuring devices
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: H04R 19/005 using semiconductor materials

Abstract

Provided is a high-sensitivity MEMS-type z-axis vibration sensor, which may sense z-axis vibration by differentially shifting an electric capacitance between a doped upper silicon layer and an upper electrode from positive to negative or vice versa when center mass of a doped polysilicon layer is moved due to z-axis vibration. Particularly, since a part of the doped upper silicon layer is additionally connected to the center mass of the doped polysilicon layer, and thus an error made by the center mass of the doped polysilicon layer is minimized, it may sensitively respond to weak vibration of low frequency such as seismic waves. Accordingly, since the high-sensitivity MEMS-type z-axis vibration sensor sensitively responds to a small amount of vibration in a low frequency band, it can be applied to a seismograph sensing seismic waves of low frequency which have a very small amount of vibration and a low vibration speed. Moreover, since the high-sensitivity MEMS-type z-axis vibration sensor has a higher vibration sensibility than MEMS-type z-axis vibration sensor of the same size, it can be useful in electronic devices which are gradually decreasing in size.

Claims

1. A high-sensitivity MEMS-type z-axis vibration sensor, which senses z-axis vibration by differentially shifting an electric capacitance between an upper electrode and a lower electrode formed above and below a center ground electrode from positive to negative or vice versa according to a change of center mass of the center ground electrode due to vibration,

wherein a part of the lower electrode is additionally connected to the center mass of the center ground electrode to increase the size of the center mass of the center ground electrode.

2. The sensor according to claim 1, wherein the lower electrode is formed by doping an upper silicon layer of an SOI substrate with impurities.

3. The sensor according to claim 1, wherein the center ground electrode is formed by doping a polysilicon layer, and vibration spaces in which the center ground electrode is capable of vibrating in a z-axis direction are formed below and above the center ground electrode.

4. The sensor according to claim 3, wherein first and second nitride layers are formed below and above the center ground electrode to protect the center ground electrode, and a first metal layer made of titanium or platinum is formed above the second nitride layer.

5. The sensor according to claim 1, wherein the upper electrode is formed by plating with nickel or gold.

6. The sensor according to claim 5, wherein second and third metal layers made of titanium or platinum are formed below and above the upper electrode.

7. The sensor according to claim 1, wherein the sensor is applied to a microphone, which senses acoustic vibration in a z-axis direction and converts into electrical signal.

8. A method of fabricating a high-sensitivity MEMS-type z-axis vibration sensor, comprising:

preparing an SOI substrate, and doping an upper silicon layer of the SOI substrate to be used as a lower electrode with impurities;

forming an oxide layer of a predetermined thickness and a polysilicon layer to be used as a center ground electrode above the doped upper silicon layer, and doping the polysilicon layer with impurities;

forming a sacrificial oxide layer of a predetermined thickness and an upper electrode above the doped polysilicon layer;

etching a silicon wafer below the SOI substrate and isolating a region to be additionally connected to center mass of the center ground electrode from the doped upper silicon layer; and

etching the sacrificial oxide layer and the oxide layer through an upper surface of the upper electrode, and forming a vibration space in which the doped polysilicon layer is capable of vibrating in a z-axis direction.

9. The method according to claim 8, wherein the preparing of the SOI substrate comprises doping the upper silicon layer of the SOI substrate with POCl₃ of high concentration to have conductivity.

10. The method according to claim 8, wherein the forming of the oxide layer comprises:

forming a silicon dummy ring above the doped upper silicon layer to define a region to be additionally connected to the center mass of the center ground electrode;

forming an oxide layer to a predetermined thickness above the upper silicon layer having the silicon dummy ring; and

forming a polysilicon layer to be used as the center ground electrode above the oxide layer, and doping the polysilicon layer with POCl₃ of high concentration to have conductivity.

11. The method according to claim 10, wherein the forming of the silicon dummy ring comprises:

forming a first upper oxide layer above the doped upper silicon layer and patterning the first upper oxide layer;

etching the doped upper silicon layer using the patterned first upper oxide layer as an etch mask, and forming the silicon dummy ring above the doped upper silicon layer; and

removing the patterned first upper oxide layer using a fluoric acid aqueous solution.

12. The method according to claim 10, wherein the forming of the oxide layer to a predetermined thickness comprises:

forming a second upper oxide layer above the upper silicon layer having the silicon dummy ring;

doping the second upper oxide layer with POCl₃, and forming a predetermined PSG layer to increase an etch rate of the oxide layer in etching the sacrificial oxide layer; and

forming a third upper oxide layer above the predetermined PSG layer.

13. The method according to claim 10, wherein the forming of the polysilicon layer to be used as the center ground electrode comprises:

forming a first nitride layer above the oxide layer;

forming a polysilicon layer to be used as the center ground electrode above the first nitride layer;

doping the polysilicon layer with POCl₃ of high concentration to have conductivity;

forming a second nitride layer above the doped polysilicon layer; and

forming a first metal layer made of titanium or platinum above the second nitride layer.

14. The method according to claim 8, wherein the forming of the sacrificial oxide layer comprises:

forming a sacrificial oxide layer to a predetermined thickness above the doped polysilicon layer, and patterning the sacrificial oxide layer;

forming a second metal layer made of titanium or platinum above the patterned sacrificial oxide layer;

forming the upper electrode by plating an upper surface of the second metal layer with nickel or gold; and

forming a third metal layer made of titanium or platinum above the upper electrode.

15. The method according to claim 10, wherein the etching of the silicon wafer below the SOI substrate comprises:

wet-etching a silicon wafer below the SOI substrate and exposing a thermal oxide layer of the SOI substrate; and

etching the exposed thermal oxide layer until the silicon dummy ring is separated from the doped upper silicon layer, and isolating a region to be additionally connected to center mass of the center ground electrode from the doped upper silicon layer.

16. The method according to claim 8, wherein further comprising mounting the entire structure obtained in etching the sacrificial oxide layer on a TO can-type or SMD-type package to be fixed thereto and vacuum-packaged.