Digital Signal Processor Having Instruction Set With One Or More Non-Linear Functions Using Reduced Look-Up Table With Exponentially Varying Step-Size

• US 20100138464A1
• Filed: 11/28/2008
• Published: 06/03/2010
• Est. Priority Date: 11/28/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Chen, Jian-Guo, Azadet, Kameran, Hijazi, Samer, Williams, Joseph
• Granted Patent: US 9,069,686 B2
• Time in Patent Office: Days
• US Class Current: 708/290
• CPC Class Codes: G06F 1/035 Reduction of table size G06F1/0314 takes precedence
• CPC Class Codes: G06F 17/10 Complex mathematical operations function generation by table look-up G06F1/03; evaluation of elementary functions by calculation G06F7/544
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/383 Operand prefetching cache prefetching G06F12/0862

Abstract

A digital signal processor and method are disclosed having an instruction set with one or more non-linear functions using a look-up table of reduced size and exponentially varying step-sizes. A digital signal processor evaluates a non-linear function for a value, x, by obtaining at least two values from at least one look-up table for the non-linear function that are near the value, x, wherein the at least one look-up table stores a subset of values for the non-linear function using exponentially-varying step sizes; and interpolating the at least two obtained values lo to obtain a result, y. A position of a leading zero in the value, x, can be used as an index into the at least one look-up table. The interpolation can comprise, for example, a linear interpolation or a polynomial interpolation. A modulo arithmetic operation can optionally be employed for a periodic non-linear function.

Claims

1. A method performed by a digital signal processor for evaluating a non-linear function for a value, x, comprising:

obtaining at least two values from at least one look-up table for said non-linear function that are near said value, x, wherein said at least one look-up table stores a subset of values for said non-linear function using exponentially-varying step sizes; and

interpolating said at least two obtained values to obtain a result, y.

2. The method of claim 1, further comprising the step of using a position of one or more leading zeros in said value, x, to access said at least one look-up table.

3. The method of claim 1, wherein said interpolating step comprises a linear interpolation.

4. The method of claim 1, wherein said interpolating step comprises a polynomial interpolation.

5. The method of claim 1, further comprising a modulo arithmetic operation for a periodic non-linear function.

6. The method of claim 1, wherein said digital signal processor executes software instructions from program code.

7. A digital signal processor, comprising:

at least one look-up table that stores a subset of values for a non-linear function using exponentially-varying step sizes; and

an interpolator that interpolates at least two values obtained from said at least one look-up table to obtain a result.

8. The digital signal processor of claim 7, wherein a position of one or more leading zeros in said value, x, is used to access said at least one look-up table.

9. The digital signal processor of claim 7, wherein said interpolator performs a linear interpolation.

10. The digital signal processor of claim 7, wherein said interpolator performs a polynomial interpolation.

11. The digital signal processor of claim 7, further comprising a modulo arithmetic operation for a periodic non-linear function.

12. The digital signal processor of claim 7, wherein said digital signal processor executes software instructions from program code.

13. An integrated circuit, comprising:

a digital signal processor, comprising;

at least one look-up table that stores a subset of values for a non-linear function using exponentially-varying step sizes; and

an interpolator that interpolates at least two values obtained from said at least one look-up table to obtain a result.

14. The integrated circuit of claim 13, wherein a position of one or more leading zeros in said value, x, is used to access said at least one look-up table.

15. The integrated circuit of claim 13, wherein said interpolator performs a linear interpolation.

16. The integrated circuit of claim 13, wherein said interpolator performs a polynomial interpolation.

17. The integrated circuit of claim 13, further comprising a modulo arithmetic operation for a periodic non-linear function.

18. The integrated circuit of claim 13, wherein said digital signal processor executes software instructions from program code.