Digital Signal Processor With One Or More Non-Linear Functions Using Factorized Polynomial Interpolation

• US 20100138465A1
• Filed: 11/28/2008
• Published: 06/03/2010
• Est. Priority Date: 11/28/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Chen, Jian-Guo, Azadet, Kameran, Hijazi, Samer, Williams, Joseph
• Granted Patent: US 9,223,752 B2
• Time in Patent Office: Days
• US Class Current: 708/290
• CPC Class Codes: G06F 1/035 Reduction of table size G06F1/0314 takes precedence
• CPC Class Codes: G06F 17/10 Complex mathematical operations function generation by table look-up G06F1/03; evaluation of elementary functions by calculation G06F7/544
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/383 Operand prefetching cache prefetching G06F12/0862

Abstract

A digital signal processor and method are disclosed with one or more non-linear functions using factorized polynomial interpolation. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values from at least one look-up table for said non-linear function that are near said value, x; and interpolating said two or more obtained values to obtain a value, y, using a factorized polynomial interpolation.

Claims

1. A method performed by a digital signal processor for evaluating a non-linear function for a value, x, comprising:

obtaining at least two values from at least one look-up table for said non-linear function that are near said value, x; and

interpolating said at least two obtained values to obtain a value, y, using a factorized polynomial interpolation.

2. The method of claim 1, further comprising a modulo arithmetic operation for a periodic non-linear function.

3. The method of claim 1, wherein said digital signal processor executes software instructions from program code.

4. A digital signal processor, comprising:

at least one look-up table that stores a subset of values for a non-linear function; and

an interpolator that interpolates at least two values obtained from said at least one look-up table to obtain a result using a factorized polynomial interpolation.

5. The digital signal processor of claim 4, further comprising a modulo arithmetic operation for a periodic non-linear function.

6. The digital signal processor of claim 4, wherein said digital signal processor executes software instructions from program code.

7. An integrated circuit, comprising:

a digital signal processor, comprising;

at least one look-up table that stores a subset of values for a non-linear function; and

an interpolator that interpolates at least two values obtained from said at least one look-up table to obtain a result using a factorized polynomial interpolation.

8. The integrated circuit of claim 7, further comprising a modulo arithmetic operation for a periodic non-linear function.

9. The integrated circuit of claim 7, wherein said digital signal processor executes software instructions from program code.