Signal Integrity Measurement Systems and Methods Using a Predominantly Digital Time-Base Generator

• US 20100138695A1
• Filed: 02/05/2010
• Published: 06/03/2010
• Est. Priority Date: 07/14/2006
• Status: Abandoned Application

• Current Assignee: DFT Microsystems, Inc.
• Original Assignee: DFT Microsystems, Inc.
• Inventors: Hafed, Mohamed M.
• Application Number:
  US12/701,282
• Publication Number:
  US 20100138695A1
• Time in Patent Office: Days
• US Class Current: 714/33
• CPC Class Codes: G01R 31/2882 Testing timing characteristics
• CPC Class Codes: G01R 31/31709 Jitter measurements; Jitter generators measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901
• CPC Class Codes: G01R 31/31725 Timing aspects, e.g. clock distribution, skew, propagation delay for tester hardware G01R31/31937
• CPC Class Codes: G01R 31/31727 Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks G01R31/31725 takes precedence; concerning scan test G01R31/318552, for tester hardware G01R31/31922

Abstract

Signal-integrity measurement systems and methods utilizing unique time-base generation techniques for controlling the sampling of one or more signals under test. A time-base generator made in accordance with the present disclosure includes a phase filter and modulation circuitry that generates a rapidly varying phase signal as a function of the output of a sigma-delta modulator. The phase filter filters unwanted high-frequency phase components from the rapidly varying phase signal. The filtered signal is used to clock one or more samplers so as to create sampling instances of the signal(s) under test. The sampling instances are then analyze using any one or more of a variety of techniques suited to the type of signal(s) under test.

Claims

1. A method of providing a time-base generator for a tester, comprising:

determining a target sampling frequency for the tester;

defining a bandwidth for a phase filter, the phase filter having a frequency response;

providing a sigma-delta modulator as a function of the frequency response of the phase filter;

simulating the sigma-delta modulator with a waveform so as to provide a simulation;

selecting a finite-length sequence at the output of the simulation; and

providing a sampler for sampling test data in response to the output of said sigma-delta modulator.

2. The method of claim 1, wherein said defining of the bandwidth for the phase filter comprises defining the bandwidth for a phase-locked loop.

3. The method of claim 1, wherein the phase filter comprises a phase-locked loop and the said providing of the sigma-delta modulator includes matching the sigma-delta modulator to the frequency response of the phase filter.

4. The method of claim 1, wherein said simulating of the sigma-delta modulator with the waveform includes simulating the sigma-delta modulator with a constant ramp waveform.

5. The method of claim 1, wherein said simulating of the sigma-delta modulator with the waveform includes simulating the sigma-delta modulator with a DC waveform.