System and Method for Detecting a Defect
First Claim
1. A system for detecting a defect of a semiconductor in a semiconductor manufacturing process, comprising:
- a circuit design data storage unit for storing circuit design data;
a layout design data storage unit for storing layout design data on a pattern;
a timing analyzer for reading the circuit design data from the circuit design data storage unit, and extracting a critical path on a circuit in which a high accuracy is required for a signal transmission operation as compared with other portions;
a critical path extractor for comparing the circuit design data read from the circuit design data storage unit with the layout design data read from the layout design data storage unit, and extracting graphical data including the critical path extracted by the timing analyzer;
a critical path storage unit for storing the graphical data including the critical path extracted by the critical path extractor;
an inspection recipe creator for deciding a to-be-inspected portion, based on coordinate information on the graphical data stored in the critical path storage unit; and
an SEM defect review apparatus for acquiring an image of the to-be-inspected portion on a wafer according to an inspection recipe created by the inspection recipe creator.
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Abstract
A system and a method for detecting a defect, capable of extracting a defect occurring depending on finishing accuracy required for circuit operation are provided. The system includes a timing analyzer for extracting a critical path in which a high accuracy is required for a signal transmission operation as compared with other portions based on circuit design data, a critical path extractor for comparing the circuit design data with layout design data on a pattern and for extracting graphical data including the critical path extracted by the timing analyzer, an inspection recipe creator for deciding a portion to be inspected, based on coordinate information on the graphical data including the critical path extracted by the critical path extractor, and an SEM defect review apparatus for acquiring an image of the decided portion to be inspected on a wafer according to an inspection recipe created by the inspection recipe creator.
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Citations
10 Claims
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1. A system for detecting a defect of a semiconductor in a semiconductor manufacturing process, comprising:
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a circuit design data storage unit for storing circuit design data; a layout design data storage unit for storing layout design data on a pattern; a timing analyzer for reading the circuit design data from the circuit design data storage unit, and extracting a critical path on a circuit in which a high accuracy is required for a signal transmission operation as compared with other portions; a critical path extractor for comparing the circuit design data read from the circuit design data storage unit with the layout design data read from the layout design data storage unit, and extracting graphical data including the critical path extracted by the timing analyzer; a critical path storage unit for storing the graphical data including the critical path extracted by the critical path extractor; an inspection recipe creator for deciding a to-be-inspected portion, based on coordinate information on the graphical data stored in the critical path storage unit; and an SEM defect review apparatus for acquiring an image of the to-be-inspected portion on a wafer according to an inspection recipe created by the inspection recipe creator. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for detecting a defect of a semiconductor in a semiconductor manufacturing process, comprising:
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extracting a critical path on a circuit in which a high accuracy is required for a signal transmission operation as compared with other portions based on circuit design data; comparing the circuit design data with layout design data, and extracting graphical data including the critical path; deciding a portion to be inspected, based on coordinate information on the extracted graphical data; and causing an SEM defect review apparatus to acquire an image of the decided portion to be inspected on a wafer.
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Specification