NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100140684A1
• Filed: 10/08/2009
• Published: 06/10/2010
• Est. Priority Date: 12/10/2008
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: OZAWA, Yoshio
• Granted Patent: US 7,927,953 B2
• Time in Patent Office: Days
• US Class Current: 257/324
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H01L 29/4234 Gate electrodes for transistors with charge trapping gate insulator
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H01L 29/7926 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels

Abstract

On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.

Claims

1. A method for manufacturing a nonvolatile semiconductor memory device, comprising:

forming a charge storage film, a tunnel insulating film, and a channel film made of a silicon crystal in this order on a gate electrode; and

forming a silicon oxide layer at an interface between the tunnel insulating film and the channel film by performing thermal treatment in an oxygen gas atmosphere.

2. The method according to claim 1, wherein a condition for the thermal treatment is such that a temperature is 700 to 1200°

C. and duration is 1 minute to 1 hour.

3. The method according to claim 1, wherein the forming the channel film includes:

depositing an amorphous silicon film; and

crystallizing the amorphous silicon film.

4. The method according to claim 1, further comprising:

forming a stacked body by alternately stacking a plurality of interlayer insulating films and the gate electrodes on a substrate; and

forming a trench in the stacked body,

the charge storage film, the tunnel insulating film, and the channel film being formed on an inner surface of the trench, and

a cavity being formed in the trench when the thermal treatment is performed, the cavity communicating with outside of the trench, and the channel film being exposed to an inner surface of the cavity.

5. The method according to claim 4, wherein the trench is shaped like a groove, and the method further comprises:

dividing the channel film along an extending direction of the trench.

6. The method according to claim 4, wherein the trench is shaped like a cylinder extending in a stacking direction of the stacked body.

7. The method according to claim 6, further comprising:

after the thermal treatment, exposing the channel film to the inner surface of the cavity; and

burying silicon in the cavity.

8. The method according to claim 4, further comprising:

burying an insulating film in the cavity.

9. The method according to claim 1, further comprising:

forming a charge block film on the gate electrode,

the charge storage film being formed on the charge block film.

10. A method for manufacturing a nonvolatile semiconductor memory device, comprising:

forming a charge storage film, a tunnel insulating film, and a channel film made of a silicon crystal in this order on a gate electrode; and

forming a silicon oxynitride layer at an interface between the tunnel insulating film and the channel film by performing thermal treatment in a nitrogen monoxide gas atmosphere.

11. The method according to claim 10, wherein a condition for the thermal treatment is such that a temperature is 700 to 1200°

C. and duration is 1 minute to 1 hour.

12. The method according to claim 10, wherein the forming the channel film includes:

depositing an amorphous silicon film; and

crystallizing the amorphous silicon film.

13. The method according to claim 10, further comprising:

forming a stacked body by alternately stacking a plurality of interlayer insulating films and the gate electrodes on a substrate; and

forming a trench in the stacked body,

the charge storage film, the tunnel insulating film, and the channel film being formed on an inner surface of the trench, and

a cavity being formed in the trench when the thermal treatment is performed, the cavity communicating with outside of the trench, and the channel film being exposed to an inner surface of the cavity.

14. The method according to claim 13, wherein the trench is shaped like a groove, and the method further comprises:

dividing the channel film along an extending direction of the trench.

15. The method according to claim 13, wherein the trench is shaped like a cylinder extending in a stacking direction of the stacked body.

16. The method according to claim 15, further comprising:

after the thermal treatment, exposing the channel film to the inner surface of the cavity; and

burying silicon in the cavity.

17. The method according to claim 13, further comprising:

burying an insulating film in the cavity.

18. The method according to claim 10, further comprising:

forming a charge block film on the gate electrode,

the charge storage film being formed on the charge block film.

19. A nonvolatile semiconductor memory device comprising:

a substrate;

a stacked body provided on the substrate, the stacked body including a plurality of interlayer insulating films and gate electrodes alternately stacked therein, and the stacked body including a trench;

a charge storage film provided on an inner surface of the trench;

a tunnel insulating film provided on the charge storage film; and

a channel film provided on the tunnel insulating film and made of a silicon crystal,

one of a silicon oxide layer and a silicon oxynitride layer being formed at an interface between the tunnel insulating film and the channel film.

20. The device according to claim 19, wherein the silicon oxynitride layer includes:

a nitrogen-rich layer formed on the channel film side and having a relatively high nitrogen concentration; and

an oxygen-rich layer formed on a side distant from the channel film and having a relatively high oxygen concentration.