Semiconductor Device and Method of Forming an IPD Beneath a Semiconductor Die with Direct Connection to External Devices

• US 20100140780A1
• Filed: 12/10/2008
• Published: 06/10/2010
• Est. Priority Date: 12/10/2008
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Original Assignee: Stats Chippac Limited
• Inventors: Kuan, Heap Hoe, Chow, Seng Guan, Huang, Rui, Lin, Yaojian
• Granted Patent: US 9,257,356 B2
• Time in Patent Office: Days
• US Class Current: 257/690
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05611 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/2612 Auxiliary members for layer connectors, e.g. spacers
• CPC Class Codes: H01L 2224/27416 Spin coating
• CPC Class Codes: H01L 2224/27436 : Lamination of a preform, e.g. foil, sheet or layer
• CPC Class Codes: H01L 2224/2919 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 : Material
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48227 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 : the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/4903 : Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/49051 : Connectors having different shapes
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83136 : involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/83191 : wherein the layer connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83385 : Shape, e.g. interlocking features
• CPC Class Codes: H01L 2224/8384 : Sintering
• CPC Class Codes: H01L 2224/83856 : Pre-cured adhesive, i.e. B-stage adhesive
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2224/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/1023 : the support being an insulating substrate
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/1088 : Arrangements to limit the height of the assembly
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/495 : Lead-frames or other flat leads H01L23/498 takes precedence; lead frame interconnections between components H01L23/52
• CPC Class Codes: H01L 23/49506 : an insulative substrate being used as a diepad, e.g. ceramic, plastic H01L23/49531 takes precedence
• CPC Class Codes: H01L 23/49541 : Geometry of the lead-frame
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/66 : High-frequency adaptations
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01083 : Bismuth [Bi]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19103 : interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A semiconductor device has a conductive layer formed on a substrate. The conductive layer has a first portion constituting contact pads and a second portion constituting an integrated passive device such as an inductor. A spacer is formed on the substrate around the second portion of the conductive layer. The spacer can be insulating material or conductive material for shielding. A semiconductor die is mounted to the spacer. An electrical connection is formed between contact pads on the semiconductor die and the contact pads on the substrate. An encapsulant is formed around the semiconductor die, electrical connections, spacer, and conductive layer. The substrate is removed to expose the conductive layer. An interconnect structure is formed on the backside of the substrate. The interconnect structure is electrically connected to the conductive layer. The semiconductor device can be integrated into a package.

Claims

1. A method of manufacturing a semiconductor device, comprising:

providing a substrate;

forming a conductive layer on the substrate, the conductive layer having a first portion constituting contact pads and a second portion constituting an inductor;

providing a semiconductor die with an insulating spacer;

leading with the insulating spacer, mounting the semiconductor die to the substrate over the second portion of the conductive layer;

forming an electrical connection between contact pads on the semiconductor die and the contact pads on the substrate;

forming an encapsulant around the semiconductor die, electrical connections, insulating spacer, and conductive layer; and

removing the substrate to expose the conductive layer.

2. The method of claim 1, further including forming an interconnect structure on the conductive layer.

3. The method of claim 1, further including:

forming an insulating layer on the conductive layer, insulating spacer, and encapsulant;

removing a portion of the insulating layer over the conductive layer; and

forming an interconnect structure over the conductive layer in the removed portion of the insulating layer.

4. The method of claim 3, wherein the insulating layer overlaps the conductive layer.

5. The method of claim 1, further including integrating the semiconductor device into a package, the conductive layer being electrically connected to other components in the package.

6. A method of manufacturing a semiconductor device, comprising:

providing a substrate;

forming a conductive layer on the substrate, the conductive layer having a first portion constituting contact pads and a second portion constituting an integrated passive device;

forming a spacer on the substrate around the second portion of the conductive layer;

mounting a semiconductor die to the spacer;

forming an electrical connection between contact pads on the semiconductor die and the contact pads on the substrate;

forming an encapsulant around the semiconductor die, electrical connections, and conductive layer; and

removing the substrate to expose the conductive layer.

7. The method of claim 6, further including forming an interconnect structure on the conductive layer.

8. The method of claim 6, further including:

forming an insulating layer on the conductive layer, spacer, and encapsulant;

removing a portion of the insulating layer over the conductive layer; and

forming an interconnect structure in the removed portion of the insulating layer over the conductive layer.

9. The method of claim 8, wherein the insulating layer overlaps the conductive layer.

10. The method of claim 6, further including mounting a semiconductor device to the conductive layer.

11. The method of claim 6, further including integrating the semiconductor device into a package, the conductive layer being electrically connected to other components in the package.

12. The method of claim 6, wherein the integrated passive device includes an inductor.

13. The method of claim 6, wherein the spacer includes an insulating material.

14. The method of claim 6, wherein the spacer includes a conductive material for shielding.

15. A method of manufacturing a semiconductor device, comprising:

providing a substrate;

forming a conductive layer on the substrate, the conductive layer including an integrated passive device;

forming a spacer on the substrate around the conductive layer;

mounting a semiconductor die to the spacer;

forming an encapsulant around the semiconductor die and conductive layer; and

removing the substrate to expose the conductive layer.

16. The method of claim 15, further including forming an interconnect structure on the conductive layer.

17. The method of claim 15, further including integrating the semiconductor device into a package, the conductive layer being electrically connected to other components in the package.

18. The method of claim 15, wherein the integrated passive device includes an inductor.

19. The method of claim 15, wherein the spacer includes an insulating material or conductive material for shielding.

20. A semiconductor device, comprising:

a spacer;

a semiconductor die mounted over the spacer;

a conductive layer formed below the spacer, the conductive layer including an integrated passive device which is exposed from the semiconductor device; and

an encapsulant formed around the semiconductor die and conductive layer.

21. The semiconductor device of claim 20, further including an interconnect structure electrically connected to the conductive layer.

22. The semiconductor device of claim 20, wherein the semiconductor device is integrated into a package.

23. The semiconductor device of claim 20, wherein the integrated passive device includes an inductor.

24. The semiconductor device of claim 20, wherein the spacer includes an insulating material or conductive material for shielding.