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Method of Forming Stacked Dies

  • US 20100144094A1
  • Filed: 12/05/2008
  • Published: 06/10/2010
  • Est. Priority Date: 12/05/2008
  • Status: Active Grant
First Claim
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1. A method of fabricating a stacked integrated circuit (IC) semiconductor die comprising:

  • forming one or more recesses in a first semiconductor wafer;

    filling the one or more recesses with conducting material to form one or more through-silicon vias in the first semiconductor wafer;

    forming one or more bonding contacts on a front-side of the first semiconductor wafer;

    attaching the front-side of the first semiconductor wafer to a carrier, exposing a back-side of the first semiconductor wafer;

    thinning the back-side of the first semiconductor wafer until the one or more through-silicon vias are exposed and slightly protrude the back-side; and

    aligning and bonding the one or more through-silicon vias with corresponding one or more bonding contacts on one or more bonding surfaces on a second semiconductor die or wafer.

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