Germanium FinFETs Having Dielectric Punch-Through Stoppers

• US 20100144121A1
• Filed: 12/05/2008
• Published: 06/10/2010
• Est. Priority Date: 12/05/2008
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lee, Chen-Yi, Hung, Shih-Ting, Yu, Chen-Hua, Chang, Cheng-Hung, Hsu, Yu-Rung, Yeh, Chen-Nan
• Granted Patent: US 8,048,723 B2
• Time in Patent Office: Days
• US Class Current: 438/478
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02617 Deposition types
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7851 with the body tied to the substrate

Abstract

A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fine. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

Claims

1. A method of forming a semiconductor structure, the method comprising:

providing a composite substrate comprising a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate;

performing a first condensation to the SiGe layer to form a condensed SiGe layer, wherein the condensed SiGe layer has a substantially uniform germanium concentration;

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a composite fin, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

oxidizing a portion of the silicon fin; and

performing a second condensation to the condensed SiGe fin.

2. The method of claim 1, wherein the first condensation is performed at a temperature between about 825°

C. and about 880°

C.

3. The method of claim 1, wherein the second condensation is performed at a temperature between about 825°

C. and about 880°

C.

4. The method of claim 1, wherein the first condensation converts substantially an entirety of the SiGe layer into the condensed SiGe layer.

5. The method of claim 1, wherein the step of oxidizing the portion of the silicon fin comprises:

filling a dielectric material to embed a bottom portion of the silicon fin therein;

forming a mask to cover a top surface and sidewalls of the condensed SiGe fin, wherein the portion of the silicon fin is exposed; and

performing an oxidation to oxidize the portion of the silicon fin and to form an oxide region.

6. The method of claim 5 further comprising, before the step of performing the second condensation, forming an additional dielectric material to a height substantially level with a top surface of the oxide region.

7. The method of claim 1 further comprising:

before the step of performing the second condensation, forming an oxide layer to cover the condensed SiGe fin;

after the step of performing the second condensation, removing the oxide layer and an additional oxide layer formed by the second condensation;

forming a gate dielectric over the condensed SiGe fin; and

forming a gate electrode over the gate dielectric.

8. A method of forming a semiconductor structure, the method comprising:

providing a bulk silicon substrate;

epitaxially growing a silicon germanium (SiGe) layer on the bulk silicon substrate; and

performing a first condensation to the SiGe layer to form a condensed SiGe layer at a temperature between about 825°

C. and about 880°

C.

9. The method of claim 8, wherein the first condensation is performed until an entirety of the SiGe layer is condensed and an entirety of the condensed SiGe layer has a substantially uniform atomic percentage.

10. The method of claim 8 further comprising:

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a composite fin, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

oxidizing an upper portion of the silicon fin, wherein the condensed SiGe fin is not oxidized; and

performing a second condensation to the condensed SiGe fin to form a substantially pure germanium fin.

11. The method of claim 8 further comprising, before the step of performing the first condensation, forming a cap layer on the SiGe layer.

12. A method of forming a semiconductor structure, the method comprising:

providing a bulk silicon substrate;

epitaxially growing a silicon germanium (SiGe) layer on the bulk silicon substrate;

performing a first condensation to the SiGe layer to form a condensed SiGe layer, wherein the first condensation is performed at an elevated temperature;

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a recess and a composite fin in the recess, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

filling a first dielectric material into the recess;

etching the first dielectric material until the condensed SiGe fin is exposed;

forming a mask to cover a top surface and sidewalls of the condensed SiGe fin;

recessing the first dielectric material to expose sidewalls of a portion of the silicon fin;

oxidizing the portion of the silicon fin to form an insulator;

filling a second dielectric material on the first dielectric material, wherein a top surface of the second dielectric material is substantially level with a top surface of the insulator; and

performing a second condensation to the condensed SiGe fin to form a substantially pure germanium fin.

13. The method of claim 12, wherein, after the step of oxidizing the portion of the silicon fin, a lower portion of the silicon fin is not oxidized.

14. The method of claim 12, wherein the elevated temperature comprises a temperature between about 825°

C. and about 880°

C.

15. The method of claim 12, wherein the step of performing the second condensation is performed at a temperature between about 825°

C. and about 880°

C.

16. The method of claim 12, wherein the insulator penetrates from one side edge of the silicon fin to an opposite side edge of the silicon fin.

17. The method of claim 12, wherein, after the step of recessing the first dielectric material to expose the sidewalls of the portion of the silicon fin, a top surface of the first dielectric material is no higher than a bottom surface of the condensed SiGe fin.

18. The method of claim 12, wherein the substantially pure germanium fin has a germanium atomic percentage of greater than about 90 percent.