METHOD TO VERIFY AN IMPLEMENTED COHERENCY ALGORITHM OF A MULTI PROCESSOR ENVIRONMENT

• US 20100146210A1
• Filed: 12/04/2008
• Published: 06/10/2010
• Est. Priority Date: 12/04/2008
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: HABERMANN, CHRISTIAN, Tast, Hans-Werner, Jacobi, Christian, Winkelmann, Ralf
• Granted Patent: US 8,108,197 B2
• Time in Patent Office: Days
• US Class Current: 711/121
• CPC Class Codes: G06F 12/0815 Cache consistency protocols

Abstract

A method to verify an implemented coherency algorithm of a multi processor environment on a single processor model is described, comprising the steps of:

• • generating a reference model reflecting a private cache hierarchy of a single processor within a multi processor environment,
  • stimulating the private cache hierarchy with simulated requests and/or cross invalidations from a core side and/or from a nest side,
  • augmenting all data available in the private cache hierarchy with two construction dates and two expiration dates, set based on interface events,
  • wherein multi processor coherency is not observed if the cache hierarchy ever returns data to the processor with an expiration date that is older than the latest construction date of all data used before.
    Further a single processor model and a computer program product to execute said method are described.

Claims

1. Method to verify an implemented coherency algorithm of a multi processor environment on a single processor model characterized by the steps of:

generating a reference model reflecting a private cache hierarchy of a single processor within a multi processor environment,

stimulating the private cache hierarchy with simulated requests and/or cross invalidations from a core side and/or from a nest side,

augmenting all data available in the private cache hierarchy with two construction dates and two expiration dates, set based on interface events, wherein multi processor coherency is not observed if the cache hierarchy ever returns data to the processor with an expiration date that is older than the latest construction date of all data used before.

2. Method according to claim 1, characterized in that a core observed time is foreseen, holding the construction date of the youngest ever used data within the private cache hierarchy, in order to check that no old data was used after younger data was seen by the core.

3. Method according to claim 1, characterized in that the method monitors three events, performs three actions and a single check.

4. Method according to claim 1, characterized in that a global time is foreseen, which is incremented ongoing, said global time is used as construction date, when new data arrives in the private cache hierarchy and said global time is used as expiration date when data within the private cache hierarchy is hit by a cross invalidation.

5. Single processor model to perform a method of claim characterized by a reference model reflecting a private cache hierarchy of a single processor within a multi processor environment, said reference model keeping four time stamps, two construction dates and two expiration dates, for every cacheline that populates the private cache hierarchy of the processor, a random simulation driver simulating a core of the single processor, a simulation driver simulating a nest accommodating a plurality of processors within a multi processor environment, a global time counter that is incremented every simulation cycle and a core observed time unit.

6. Single processor model according to claim 5, characterized in that in order to simulate the core and in order to simulate the nest the random simulation driver and the simulation driver generate requests and/or cross invalidations from a core side and/or from a nest side respectively.

7. A computer program product stored on a computer usable medium, comprising computer readable program means for causing a computer to perform the method of claim, when said computer program product is executed on a computer.