Digital Calibration Techniques for Segmented Capacitor Arrays
First Claim
Patent Images
1. An apparatus comprising:
- phase detection circuitry that generates control signals in response to an input clock signal and a feedback clock signal;
a clock signal generation circuit comprising fine and coarse capacitors, the clock signal generation circuit changing a capacitance of the capacitors that are affecting the output clock signal in response to a change in the control signals; and
measurement circuitry that determines a calibration number of the fine capacitors having a combined capacitance that most closely matches a capacitance of one of the coarse capacitors.
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Abstract
An apparatus includes phase detection circuitry that generates control signals in response to an input clock signal and a feedback clock signal. The apparatus also includes a clock signal generation circuit that includes fine and coarse capacitors. The clock signal generation circuit changes a capacitance of the capacitors that are affecting the output clock signal in response to a change in the control signals. The apparatus also includes measurement circuitry that determines a calibration number of the fine capacitors having a combined capacitance that most closely matches a capacitance of one of the coarse capacitors.
13 Citations
20 Claims
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1. An apparatus comprising:
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phase detection circuitry that generates control signals in response to an input clock signal and a feedback clock signal; a clock signal generation circuit comprising fine and coarse capacitors, the clock signal generation circuit changing a capacitance of the capacitors that are affecting the output clock signal in response to a change in the control signals; and measurement circuitry that determines a calibration number of the fine capacitors having a combined capacitance that most closely matches a capacitance of one of the coarse capacitors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A circuit comprising:
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phase detection circuitry that generates control signals in response to an input clock signal and a feedback clock signal; and a clock signal generation circuit comprising fine and coarse capacitors, the clock signal generation circuit changing a capacitance of the fine and the coarse capacitors that are affecting the output clock signal in response to a change in the control signals, wherein a measurement circuit determines a calibration number of the fine capacitors having a combined capacitance that most closely matches a capacitance of one of the coarse capacitors, and a number of the fine capacitors affecting the output clock signal is based on the calibration number when a number of coarse capacitors affecting the output clock signal changes. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A method for generating a periodic signal, the method comprising:
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comparing phases of a periodic input signal and a periodic feedback signal to generate control signals; varying a capacitance of fine and coarse capacitors that are affecting a phase of a periodic output signal in response to changes in the control signals; and determining a calibration number of the fine capacitors that have a combined capacitance most closely matching a capacitance of one of the coarse capacitors. - View Dependent Claims (19, 20)
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Specification