APPARATUS FOR DECODING CONVOLUTIONAL CODES AND ASSOCIATED METHOD

• US 20100150282A1
• Filed: 02/22/2010
• Published: 06/17/2010
• Est. Priority Date: 02/08/2006
• Status: Active Grant

• Current Assignee: Harris Global Communications, Inc. (L3Harris Technologies, Inc.)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Nieto, John W., Furman, William N.
• Granted Patent: US 8,077,813 B2
• Time in Patent Office: Days
• US Class Current: 375/341
• CPC Class Codes: H04L 1/0036 arrangements specific to the receiver
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0059 Convolutional codes

Abstract

A decoding device may include a sequential convolutional code decoder, and a parallel convolutional code decoder. The decoding device may further include a controller for selectively processing a convolutionally encoded input signal via at least one of the sequential convolutional code decoder and the parallel convolutional code decoder. The selection of decoder may be based upon a signal-to-noise ratio or the passage of time, for example.

Claims

1-28. -28. (canceled)

29. An electronic device comprising:

a wireless receiver configured to receive a convolutionally encoded input signal;

a sequential convolutional code decoder;

a parallel convolutional code decoder; and

a controller configured to initially process the convolutionally encoded input signal via said sequential convolutional code decoder, and a threshold time period thereafter process the convolutionally encoded input signal via said parallel convolutional code decoder.

30. The electronic device according to claim 29 wherein said parallel convolutional code decoder is configured to use partially decoded data from said sequential convolutional code decoder.

31. The electronic device according to claim 29 wherein said parallel convolutional code decoder is configured to not use partially decoded data from said sequential convolutional code decoder.

32. The electronic device according to claim 29 wherein said sequential convolutional code decoder comprises a Fano decoder.

33. The electronic device according to claim 29 wherein said parallel convolutional code decoder comprises a Viterbi decoder.

34. The electronic device according to claim 29 wherein said sequential convolutional code decoder has a first constraint length, and said parallel convolutional code decoder has a second constraint length equal to said first constraint length.

35. The electronic device according to claim 34 wherein each of the first and second constraint lengths is less than about 10.

36. An electronic device comprising:

a wireless receiver configured to receive a convolutionally encoded input signal;

a sequential convolutional code decoder;

a parallel Viterbi convolutional code decoder;

said sequential convolutional code decoder having a first constraint length, and said parallel Viterbi convolutional code decoder having a second constraint length equal to the first constraint length; and

a controller configured to initially process the convolutionally encoded input signal via said sequential convolutional code decoder, and a threshold time period thereafter process the convolutionally encoded input signal via said parallel Viterbi convolutional code decoder.

37. The electronic device according to claim 36 wherein said parallel convolutional code decoder is configured to use partially decoded data from said sequential convolutional code decoder.

38. The electronic device according to claim 36 wherein said parallel convolutional code decoder is configured to not use partially decoded data from said sequential convolutional code decoder.

39. The electronic device according to claim 36 wherein said sequential convolutional code decoder comprises a Fano decoder.

40. The electronic device according to claim 36 wherein each of the first and second constraint lengths is less than about 10.

41. An electronic device comprising:

a wireless receiver configured to receive a convolutionally encoded input signal;

a sequential Fano convolutional code decoder;

a parallel convolutional code decoder;

said sequential Fano convolutional code decoder having a first constraint length, and said parallel convolutional code decoder having a second constraint length equal to the first constraint length; and

a controller configured to initially process the convolutionally encoded input signal via said sequential Fano convolutional code decoder, and a threshold time period thereafter process the convolutionally encoded input signal via said parallel convolutional code decoder.

42. The electronic device according to claim 41 wherein said parallel convolutional code decoder is configured to use partially decoded data from said sequential convolutional code decoder.

43. The electronic device according to claim 41 wherein said parallel convolutional code decoder is configured to not use partially decoded data from said sequential convolutional code decoder.

44. The electronic device according to claim 41 wherein each of the first and second constraint lengths is less than about 10.

45. A method of decoding a convolutionally encoded input signal using a decoding device comprising a sequential convolutional code decoder, a parallel convolutional code decoder, and a controller connected to the sequential convolutional code decoder and the parallel convolutional code decoder, the method comprising:

using the controller to initially process the convolutionally encoded input signal via the sequential convolutional code decoder; and

using the controller to process the convolutionally encoded input signal via the parallel convolutional code decoder a threshold time period after the initial processing.

46. The method according to claim 45 further comprising using partially decoded data from the sequential convolutional code decoder in the parallel convolutional code decoder.

47. The method according to claim 45 further comprising not using partially decoded data from the sequential convolutional code decoder in the parallel convolutional code decoder.

48. The method according to claim 45 wherein the sequential convolutional code decoder comprises a Fano decoder, and the parallel convolutional code decoder comprises a Viterbi decoder.

49. The method according to claim 45 wherein the sequential convolutional code decoder has a first constraint length, and the parallel convolutional code decoder has a second constraint length equal to the first constraint length.