METHOD AND APPARATUS FOR OPTIMIZING POWER CONSUMPTION IN A MULTIPROCESSOR ENVIRONMENT
First Claim
1. An apparatus comprising:
- a load balancer that is operative to select at least one of a plurality of processing elements to execute a task based on the task, wherein the task indicates how to distribute the task among the plurality of processing elements.
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Accused Products
Abstract
A method and apparatus for reducing net power consumption in a computer system includes identifying a plurality of processing states operable to execute a task. A processing state and current drain pattern is selected that is most power efficient. A selected processing state may include one or more processing elements of the computer system such as one or more processors or accelerators and indicates the manner in which one or more portions of the received task may be distributed among the processing elements of the computer system. The current drain pattern selected may be a constant current drain pattern or a pulsed current drain pattern and may be selected to optimize power consumption when executing the task among the one or more processing elements.
50 Citations
20 Claims
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1. An apparatus comprising:
a load balancer that is operative to select at least one of a plurality of processing elements to execute a task based on the task, wherein the task indicates how to distribute the task among the plurality of processing elements. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method comprising:
selecting at least one of a plurality of processing elements to execute a task based on the task, wherein the task indicates how to distribute the task among the plurality of processing elements. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
- 17. A computer readable medium comprising instructions that when executed by at least one processor cause the at least one processor to select at least one of a plurality of processing elements to execute a task based on the task, wherein the task indicates how to distribute the task among the plurality of processing elements.
Specification