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ERROR DETECTION IN PHYSICAL INTERFACES FOR POINT-TO-POINT COMMUNICATIONS BETWEEN INTEGRATED CIRCUITS

  • US 20100153805A1
  • Filed: 02/24/2010
  • Published: 06/17/2010
  • Est. Priority Date: 03/09/2006
  • Status: Active Grant
First Claim
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1. An apparatus for generating error-detection codes in a physical interface for the transmission of data communications between integrated circuits (“

  • ICs”

    ), the apparatus comprising;

    an N bit-to-N+2 (“

    N bit/N+2”

    ) bit physical layer (“

    PHY”

    ) encoder configured to;

    insert a physical interface error detection bit with N application data bits to form N+1 unencoded data bits, andencode said N+1 unencoded data bits to yield N+2 encoded data bits; and

    an error-detection code generator configured to generate a number of bits constituting an error-detection code that includes said physical interface error detection bit,wherein N represents any integer number of data bits.

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