DIGITAL-DRIVE ELECTROLUMINESCENT DISPLAY WITH AGING COMPENSATION

• US 20100156766A1
• Filed: 12/18/2008
• Published: 06/24/2010
• Est. Priority Date: 12/18/2008
• Status: Active Grant

• Current Assignee: Global OLED Technology LLC (LG Display Co., Ltd.)
• Original Assignee: Global OLED Technology LLC (LG Display Co., Ltd.)
• Inventors: Parett, Gary, Leon, Fellpe A., Hamer, John W., Levey, Charles I., White, Christopher J.
• Granted Patent: US 8,130,182 B2
• Time in Patent Office: Days
• US Class Current: 345/78
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/041 Temperature compensation
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

An electroluminescent (EL) subpixel driven by a digital-drive scheme has a readout transistor driven by a current source when the drive transistor is non-conducting. This produces an emitter-voltage signal from which an aging signal representing the efficiency of the EL emitter can be computed. The aging signal is used to determine the loss in current of the subpixel when active, and an input signal is adjusted to provide increased on-time to compensate for voltage rise and efficiency loss of the EL emitter. Variations due to temperature can also be compensated for.

Claims

1. A method of compensating for variations in characteristics of an electroluminescent (EL) emitter in an EL subpixel, comprising:

(a) providing the EL subpixel having a drive transistor, the EL emitter, and a readout transistor, wherein the drive transistor has a first electrode, a second electrode, and a gate electrode;

(b) providing a first voltage source and a first switch for selectively connecting the first voltage source to the first electrode of the drive transistor;

(c) connecting the EL emitter to the second electrode of the drive transistor;

(d) providing a second voltage source connected to the EL emitter;

(e) connecting the first electrode of the readout transistor to the second electrode of the drive transistor;

(f) providing a current source and a third switch for selectively connecting the current source to the second electrode of the readout transistor, wherein the current source provides a selected test current to the EL emitter;

(g) providing a voltage measurement circuit connected to the second electrode of the readout transistor;

(h) opening the first switch, closing the third switch, and in response to the voltage measurement circuit measuring the voltage at the second electrode of the readout transistor to provide a first emitter-voltage signal;

(i) using the first emitter-voltage signal to provide an aging signal representative of characteristics of the EL emitter;

(j) receiving an input signal;

(k) using the aging signal and the input signal to produce a compensated drive signal; and

(l) providing a selected drive voltage to the gate electrode of the drive transistor for a selected on-time corresponding to the compensated drive signal, wherein the selected drive voltage causes the drive transistor to operate in a linear region during the selected on-time, to compensate for variations in characteristics of the EL emitter.

2. The method of claim 1, wherein the variations in characteristics of the EL emitter are caused by aging of the EL emitter.

3. The method of claim 1, wherein the variations in characteristics of the EL emitter are caused by variations in the temperature of the EL emitter.

4. The method of claim 1, further including providing a second switch for selectively connecting the EL emitter to the second voltage source, and wherein step h further includes closing the second switch.

5. The method of claim 1, wherein step (h) further includes:

(i) measuring the voltage at the second electrode of the readout transistor at a first time to provide the first emitter-voltage signal;

(ii) storing the first emitter-voltage signal;

(iii) measuring the voltage at the second electrode of the readout transistor at a second time to provide a second emitter-voltage signal, wherein the second time is different from the first time; and

(iv) storing the second emitter-voltage signal;

and wherein step (i) further includes additionally using the second emitter-voltage signal to provide the aging signal.

6. The method of claim 1, wherein the voltage measurement circuit includes an analog-to-digital converter.

7. The method of claim 1, further including providing a plurality of EL subpixels, wherein steps (h) and (i) are performed for each EL subpixel to produce a plurality of corresponding aging signals, and wherein steps (j) through (l) are performed for each of the plurality of subpixels using the corresponding aging signals.

8. The method of claim 7, wherein step (h) is performed for a plurality of such EL subpixels during which the current source provides the selected test current to the respective EL emitters in each of the plurality of EL subpixels simultaneously.

9. The method of claim 7 wherein the EL subpixels are arranged in rows and columns and wherein each EL subpixel has a corresponding select transistor, and further including providing a plurality of row select lines connected to the gate electrodes of the corresponding select transistors and a plurality of readout lines connected to the second electrodes of corresponding readout transistors.

10. The method of claim 7, further including providing a plurality of data lines connected to respective first electrodes of the corresponding select transistors, and wherein step (l) includes providing a driver circuit having a gate driver connected to the row select lines, and a source driver connected to the data lines, for providing the selected drive voltage to the gate electrode of the drive transistor.

11. The method of claim 7, further including using a multiplexer connected to the plurality of readout lines for sequentially measuring each of the plurality of EL subpixels to provide corresponding first emitter-voltage signals.

12. The method of claim 1, further including providing a select transistor connected to the gate electrode of the drive transistor, and wherein the gate electrode of the select transistor is connected to the gate electrode of the readout transistor.

13. The method of claim 1, wherein each EL emitter is an OLED emitter, and wherein each EL subpixel is an OLED subpixel.

14. The method of claim 1, wherein the selected on-time is divided into a plurality of activated subframes having respective subframe durations, wherein the sum of the respective subframe durations equals the selected on-time.

15. The method of claim 1, wherein each drive transistor is a p-channel, low-temperature polysilicon drive transistor.

16. The method of claim 1, further including providing a drive transistor load line, and wherein step (i) further includes additionally using the drive transistor load line to provide the aging signal.

17. The method of claim 5, further including:

(m) providing a second switch for selectively connecting the EL emitter to the second voltage source;

(n) providing a current sink and a fourth switch for selectively connecting the current sink to the second electrode of the readout transistor;

(o) closing the first switch, opening the second switch, opening the third switch, and closing the fourth switch, and providing a selected test voltage to the gate electrode of the drive transistor;

(p) using the current sink to cause a selected first current to pass through the first and second electrodes of the drive transistor, and measuring the voltage at the second electrode of the readout transistor to provide a first transistor-voltage signal; and

(q) using the current sink to cause a selected second current to pass through the first and second electrodes of the drive transistor, and measuring the voltage at the second electrode of the readout transistor to provide a second transistor-voltage signal, wherein the second current is not equal to the first current;

wherein step (h) further includes closing the second switch and opening the fourth switch; and

wherein step (i) further includes additionally using the first and second transistor-voltage signals to provide the aging signal.

18. The method of claim 17, wherein the selected test voltage equals the selected drive voltage.

19. The method of claim 17, further including using the first and second transistor-voltage signals and the first and second currents to provide a drive transistor load line, wherein step i further includes additionally using the drive transistor load line to provide the aging signal.