METHOD AND SYSTEM FOR IMPROVED FLASH CONTROLLER COMMANDS SELECTION

• US 20100161941A1
• Filed: 12/19/2008
• Published: 06/24/2010
• Est. Priority Date: 12/19/2008
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Vyshetsky, Dmitry, Tsai, Howard, Gyugyi, Paul
• Granted Patent: US 9,208,108 B2
• Time in Patent Office: Days
• US Class Current: 712/205
• CPC Class Codes: G06F 13/1605 based on arbitration arbitration in handling access to a common bus or bus system G06F13/36
• CPC Class Codes: G06F 9/38 Concurrent instruction execution, e.g. pipeline or look ahead

Abstract

A system for selecting a subset of issued flash storage commands to improve processing time for command execution. A plurality of ports stores a first plurality of command identifiers and are associated with the plurality of ports. Each of the first plurality of arbiters selects an oldest command identifier among command identifiers within each corresponding port resulting in a second plurality of command identifiers. A second arbiter makes a plurality of selections from the second plurality of command identifiers based on command identifier age and the priority of the port. A session identifier queue stores commands associated with the plurality of selections among other commands forming a third plurality of commands. A microcontroller selects an executable command from the third plurality of commands for execution based on an execution optimization heuristic. After execution of the command, the command identifier in the port is cleared.

Claims

1. A system for selecting a subset of issued flash storage commands comprising:

a plurality of ports operable to store a first plurality of command identifiers;

a first plurality of arbiters associated with said plurality of ports, wherein each of said first plurality of arbiters is operable to select a particular command identifier among command identifiers within each corresponding port based on age, wherein selection of said particular command identifier of each port results in a second plurality of command identifiers;

a second arbiter operable to make a selection from said second plurality of command identifiers based on ages of said second plurality of command identifiers;

a session memory operable to store fetched commands associated with command identifiers selected by said second arbiter to form a third plurality of commands; and

a microcontroller operable to apply a selection heuristic to said third plurality of commands to select a command for execution.

2. The system as described in claim 1, wherein said selection of said second arbiter is further based on a priority of said plurality of ports.

3. The system as described in claim 1, wherein said microcontroller is further operable to execute said command selected by said heuristic.

4. The system as described in claim 3, wherein said microcontroller clears said command from said session memory after execution thereof.

5. The system as described in claim 1, wherein said microcontroller after executing said command is operable to cause a command identifier associated with said executed command to be cleared from a port storing said command identifier.

6. The system as described in claim 5, wherein said first plurality of arbiters selects an oldest command identifier among command identifiers stored in each of said plurality of ports resulting in said second plurality of command identifiers, and wherein a selection by said second arbiter comprises an oldest command identifier among said second plurality of command identifiers.

7. The system as described in claim 1 further comprising:

an instruction fetch unit operable to fetch commands selected by said second arbiter and store them into said session memory.

8. A method of selecting a subset of issued flash commands, said method comprising:

storing a first plurality of command identifiers in a plurality of ports, wherein said plurality of ports is associated with a first plurality of arbiters;

selecting an oldest command identifier from each port of said plurality of ports, wherein said selecting results in a second plurality of command identifiers;

selecting a third plurality of command identifiers from said second plurality of command identifiers based on an oldest command identifier of said second plurality of command identifiers;

storing a plurality of commands associated with said third plurality of command identifiers within a session memory; and

applying an execution ordering heuristic to said commands stored in said session memory to select at least one executable command.

9. The method as described in claim 8 further comprising:

executing said at least one executable command by a microcontroller.

10. The method as described in claim 8, wherein said selecting said oldest command identifier from each port of said plurality of ports is performed by said first plurality of arbiters.

11. The method as described in claim 8, wherein said selecting said third plurality of command identifiers is performed by a second arbiter different from said first plurality of arbiters.

12. The method as described in claim 8 further comprising:

using a fetching unit to fetch said plurality of commands from a memory component based on said third plurality of command identifiers.

13. The method as described in claim 8, wherein said selecting said third plurality of command identifiers is further based on a priority of said plurality of ports.

14. The method as described in claim 8 further comprising:

clearing said executable command from said session memory after execution thereof by a microcontroller; and

in response to said clearing, storing a new command identifier in a location within a port that corresponds to a command identifier associated with said executable command.

15. A method of selecting a subset of issued flash storage commands, said method comprising:

selecting a first plurality of command identifiers from a plurality of ports, wherein each of said first plurality of command identifiers is an oldest issued command identifier within each of said plurality of ports;

selecting a second plurality of command identifiers from said first plurality of command identifiers, wherein said second plurality of command identifiers is selected based on ages of said first plurality of command identifiers and based on port priorities corresponding to said first plurality of command identifiers;

storing a plurality of commands associated with said second plurality of command identifiers in to a memory; and

applying an execution ordering process to said plurality of commands to select at least one command from said plurality of commands for execution by a microcontroller.

16. The method as described in claim 15 further comprising:

executing said at least one command by said microcontroller.

17. The method as described in claim 15 further comprising:

prior to said storing, fetching said plurality of commands from a memory component based on said second plurality of command identifiers.

18. The method as described in claim 15 further comprising:

clearing a command identifier in a port within said plurality of ports, wherein said command identifier corresponds to a command executed by said microcontroller.

19. The method as described in claim 18 further comprising:

in response to said clearing, storing a new command identifier in said port.

20. The method as described in claim 15, wherein said selecting said first plurality of command identifiers is performed by a first plurality of arbiters, and wherein selecting said second plurality of command identifiers is performed by a second arbiter coupled to said first plurality of arbiters.

21. The method as described in claim 15, wherein said execution ordering process attempts to optimize execution time of said microcontroller.