METHODS OF FORMING NICKEL SULFIDE FILM ON A SEMICONDUCTOR DEVICE

• US 20100163937A1
• Filed: 12/31/2008
• Published: 07/01/2010
• Est. Priority Date: 12/31/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Mukherjee, Niloy, Pillarisetty, Ravi, Clendenning, Scott Bruce
• Granted Patent: US 7,964,490 B2
• Time in Patent Office: Days
• US Class Current: 257/288
• CPC Class Codes: C23C 16/305 Sulfides, selenides, or tellurides
• CPC Class Codes: C23C 16/45525 Atomic layer deposition [ALD]
• CPC Class Codes: H01L 21/28562 Selective deposition
• CPC Class Codes: H01L 21/28568 the conductive layers comprising transition metals H01L21/28518 takes precedence
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 23/53257 the principal metal being a refractory metal
• CPC Class Codes: H01L 23/53266 Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 29/41791 for transistors with a horizontal current flow in a vertical sidewall, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Embodiments of the present invention describe a method of forming nickel sulfide layer on a semiconductor device. A nickel sulfide layer is formed on a substrate by alternatingly exposing the substrate to a nickel-containing precursor and a sulfur-containing precursor.

Claims

1. A method of forming a semiconductor device comprising:

providing a substrate;

exposing a desired region of the substrate to a nickel-containing; and

exposing the desired region of the substrate to a sulfur-containing precursor to form a nickel sulfide film on the desired region.

2. The method of claim 1 further comprising:

repeating exposing desired region of substrate to the nickel-containing precursor and exposing desired region of substrate to the sulfur-containing precursor in an alternating manner.

3. The method of claim 1 further comprising:

purging the nickel-containing precursor from the substrate before exposing the desired region of substrate to the sulfur-containing precursor; and

purging the sulfur-containing precursor from the substrate before exposing the desired region of substrate to the nickel-containing precursor.

4. The method of claim 1, wherein no reactive annealing process is performed so that the nickel sulfide film does not react with the desired region of substrate.

5. The method of claim 1, wherein the nickel-containing precursor is made of a nickel organometallic compound selected from the group consisting of amidinates, alkyls, allyls, β

-diketonates, β

-diketimines, pyrrolyls, imines, amides, alkoxides, cyclopentadienyls, halides, and heteroleptic compounds.

6. The method of claim 1, wherein the sulfur-containing precursor is made of a material selected from the group of hydrogen sulfide, polysufanes, alkyl sulfides and di-alkyl sulfides.

7. The method of claim 1, wherein the desired region of substrate is made of a material selected from the group consisting of silicon, germanium silicon, germanium, and III-V semiconductor compounds.

8. The method of claim 1, wherein the desired region of substrate is made of an insulative material selected from the group consisting of dielectrics, oxides, and metal oxides.

9. The method of claim 1, wherein providing the substrate further comprises:

exposing the desired region of substrate to a chemical treatment to form a hydrogen-terminated surface thereon before exposing the desired region to the nickel-containing precursor or the sulfur-containing precursor.

10. The method of claim 1, wherein providing the substrate further comprises:

exposing the desired region of substrate to nucleation promoting substances before exposing the desired region to the nickel-containing precursor or the sulfur-containing precursor.

11. The method of claim 1, wherein providing the substrate further comprises:

performing a plasma treatment on the desired region of substrate before exposing the desired region to the nickel-containing precursor or the sulfur-containing precursor.

12. The method of claim 1 further comprising:

performing a plasma treatment on the desired region of substrate after exposing the desired region to the nickel-containing precursor or the sulfur-containing precursor.

13. The method of claim 1, wherein exposing the desired region of the substrate to a sulfur-containing precursor comprises exposing the desired region of the substrate simultaneously to a plasma source.

14. The method of claim 1 further comprising:

heating the substrate to a constant temperature of greater than 25 degrees Celsius.

15. A method of forming a semiconductor device comprising:

providing a substrate;

forming a semiconductor body on the substrate the semiconductor body having a top surface and sidewalls extending from the top surface of semiconductor body to the substrate;

alternatingly exposing the semiconductor body to a nickel-containing precursor and a sulfur-containing precursor to conformally deposit a nickel sulfide film on the top surface and sidewalls of the semiconductor body.

16. The method of claim 15, wherein the semiconductor body comprises

a source region;

a drain region; and

a channel region between the source and drain regions,

wherein the source and drain regions each includes the top surface, and sidewalls extending from the top surface to the substrate.

17. The method of claim 16, further comprising:

forming a gate electrode around the channel region of the semiconductor body.

18. The method of claim 16, wherein the top surface and sidewalls of each source and drain regions are alternatingly exposed to the nickel-containing precursor and sulfur-containing precursor to conformally deposit nickel sulfide film onto the top surface and sidewalls of each source and drain regions.

19. The method of claim 15 further comprising:

repeating alternatingly exposing the semiconductor body to a nickel-containing precursor and a sulfur-containing precursor.

20. The method of claim 15, wherein no reactive annealing process is performed so that the nickel sulfide film does not react with the semiconductor body.

21. The method of claim 15, wherein the nickel-containing precursor is made of a nickel organometallic compound selected from the group consisting of amidinates, alkyls, allyls, β

-diketonates, β

-diketimines, pyrrolyls, imines, amides, alkoxides, cyclopentadienyls, halides, and heteroleptic compounds.

22. The method of claim 15, wherein the sulfur-containing precursor is made of a material selected from the group of hydrogen sulfide, polysulfanes, alkyl sulfides and di-alkyl sulfides.

23. A semiconductor device, comprising:

a substrate having a gate electrode formed thereon;

a source region and a drain region formed on the substrate, wherein the source and drain regions are formed on opposite sides of the gate electrode;

a first nickel sulfide layer formed on the source region; and

a second nickel sulfide layer formed on the drain region.

24. The semiconductor device of claim 23, further comprising

an interlayer dielectric formed on the substrate and the source and drain regions, the interlayer dielectric having

a first opening extending from the top surface of interlayer dielectric to the source region;

and

a second opening extending from the top surface of interlayer dielectric to the drain region

25. The semiconductor device of claim 24,

wherein the first nickel sulfide layer is formed in the first opening, and

wherein the second nickel sulfide layer is formed in the second opening.

26. The semiconductor device of claim 23, wherein the source region and drain region each includes

a top surface;

a first sidewall and a second sidewall, wherein the first and second sidewalls extend from the top surface to the substrate.

27. The semiconductor of claim 24,

wherein the first nickel sulfide contact layer is conformally deposited on the top surface and the first and second sidewalls of the source region.

wherein the second nickel sulfide contact layer is conformally deposited on the top surface and the first and second sidewalls of the drain region.

28. The semiconductor device of claim 23, wherein the first and second nickel sulfide contact layers have a composition comprising about 62 to 66 atomic percent nickel, and about 32 to 35 atomic percent sulfur.

29. The semiconductor device of claim 23 further comprising a dielectric layer formed between the substrate and the first nickel sulfide layer or second nickel sulfide layer.