Electronic system with component redundancy, and control chain for a motor implementing such system
First Claim
1. An electronic system with component redundancy, comprising:
- a first processing unit, able to implement algorithms, connected to a first board for acquiring input signals that are capable of being delivered by at least one sensor, and/or for generating output signals that are capable of controlling at least one actuator,a second processing unit able to implement the same algorithms as those implemented by the first unit, and which is connected to a second board for acquiring the same input signals that are capable of being delivered by the sensor as those received by the first board and/or for generating the same output signals that are capable of controlling the actuator as those generated by the first board,each processing unit and each board including a first communication port, the first communication ports of the first unit and of the first board, and, respectively, of the second unit and of the second board, being interconnected by a wired communication link,wherein in that each processing unit and each board include a second communication port, in that the second port of the first board is connected to the second port of the second unit by a wired communication link, in that the second port of the second board is connected to the second port of the first unit by a wired communication link, wherein each communication port can be activated by a software activation command, and wherein each communication port can be deactivated by a software deactivation command.
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Accused Products
Abstract
An electronic system with component redundancy includes a first processing unit, connected to a first board, and a second processing unit redundant with respect to the first unit, and connected to a second board redundant with respect to the first board. Each processing unit and each board include a first communication port, the first communication ports of the first unit and of the first board, and, respectively, of the second unit and of the second board, being interconnected by a wired communication link. Each processing unit and each board include a second communication port, the second port of the first board being connected to the second port of the second unit by a wired communication link, and the second port of the second board being connected to the second port of the first unit by a wired communication link, each communication port able to be activated or deactivated by a corresponding software command.
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Citations
11 Claims
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1. An electronic system with component redundancy, comprising:
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a first processing unit, able to implement algorithms, connected to a first board for acquiring input signals that are capable of being delivered by at least one sensor, and/or for generating output signals that are capable of controlling at least one actuator, a second processing unit able to implement the same algorithms as those implemented by the first unit, and which is connected to a second board for acquiring the same input signals that are capable of being delivered by the sensor as those received by the first board and/or for generating the same output signals that are capable of controlling the actuator as those generated by the first board, each processing unit and each board including a first communication port, the first communication ports of the first unit and of the first board, and, respectively, of the second unit and of the second board, being interconnected by a wired communication link, wherein in that each processing unit and each board include a second communication port, in that the second port of the first board is connected to the second port of the second unit by a wired communication link, in that the second port of the second board is connected to the second port of the first unit by a wired communication link, wherein each communication port can be activated by a software activation command, and wherein each communication port can be deactivated by a software deactivation command. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification