NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION

• US 20100174854A1
• Filed: 12/10/2009
• Published: 07/08/2010
• Est. Priority Date: 02/16/2007
• Status: Active Grant

• Current Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Original Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Inventors: KIM, Jin-Ki
• Granted Patent: US 8,045,377 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7204 Capacity control, e.g. partitioning, end-of-life degradation
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/06 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels
• CPC Class Codes: G11C 2211/5646 Multilevel memory with flag bits, e.g. for showing that a "first page" of a word line is programmed but not a "second page"

Abstract

A method and system for extending the life span of a flash memory device. The flash memory device is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the multiple bit per cell (MBC) mode, such that both SBC data and MBC data co-exist within the same memory array. One or more tag bits stored in each page of the memory is used to indicate the type of storage mode used for storing the data in the corresponding subdivision, where a subdivision can be a bank, block or page. A controller monitors the number of program-erase cycles corresponding to each page for selectively changing the storage mode in order to maximize lifespan of any subdivision of the multi-mode flash memory device.

Claims

1. (canceled)

2. (canceled)

3. (canceled)

4. (canceled)

5. (canceled)

6. (canceled)

7. (canceled)

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9. (canceled)

10. A method for extending life span of a NAND flash memory device, comprising:

receiving a programming instruction to program data in a subdivision configured in a first storage mode;

programming the data to a new subdivision if program/erase cycles corresponding to the subdivision is reached; and

,

converting the subdivision to a second storage storage mode.

11. The method of claim 10, wherein programming the data to the new subdivision is carried out before converting.

12. The method of claim 10, wherein programming includes comparing the program/erase cycles corresponding to the subdivision to a predetermined limit.

13. The method of claim 12, wherein programming includes programming the data to the subdivision if the program/erase cycles corresponding to the subdivision is less than the predetermined limit.

14. The method of claim 10, wherein converting includes changing storage mode data corresponding to the subdivision from the first storage mode to the second storage mode.

15. The method of claim 14, wherein the storage mode data includes a mode tag bit for identifying one of the first storage mode and the second storage mode of the subdivision.

16. The method of claim 15, wherein the mode tag bit is stored in an address mapping table.

17. The method of claim 15, wherein the mode tag bit is stored in the subdivision.

18. The method of claim 10, wherein the first storage mode is a multiple bit per cell (MBC) storage mode and the second storage mode is a single bit per cell (SBC) storage mode.

19. The method of claim 18, wherein converting includes resetting a counter for tracking SBC program/erase cycles of the subdivision.

20. The method of claim 18, further including reclaiming the subdivision configured for SBC storage for MBC storage.

21. The method of claim 20, wherein reclaiming includes determining if the subdivision can be reclaimed.

22. The method of claim 21, wherein determining includes comparing SBC program/erase cycles corresponding to the subdivision to a reclaim limit, and ending reclaiming if the SBC program/erase cycles reaches the reclaim limit.

23. The method of claim 22, further including determining a status of a lock bit corresponding to the subdivision if the SBC program/erase cycles corresponding to the subdivision is less than the reclaim limit.

24. The method of claim 23, further including changing storage mode data corresponding to the subdivision from the SBC storage mode to the MBC storage mode if the lock bit is not set.

25. The method of claim 24, further including setting the lock bit corresponding to the subdivision.

26. The method of claim 10, wherein the first storage mode is a single bit per cell (SBC) storage mode and the second storage mode is a multiple bit per cell (MBC) storage mode.

27. The method of claim 26, wherein converting the subdivision from the MBC storage mode to the SBC storage mode is prevented if a lock bit corresponding to the subdivision is set.