3D INTEGRATION OF VERTICAL COMPONENTS IN RECONSTITUTED SUBSTRATES

• US 20100181679A1
• Filed: 06/05/2008
• Published: 07/22/2010
• Est. Priority Date: 06/07/2007
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: Souriau, Jean-Charles, Verrun, Sophie, Baleras, Francois, Poupon, Gilles
• Granted Patent: US 8,039,306 B2
• Time in Patent Office: Days
• US Class Current: 257/773
• CPC Class Codes: B81B 2207/07 Interconnects
• CPC Class Codes: B81C 1/00238 Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
• CPC Class Codes: B81C 2201/019 Bonding or gluing multiple substrate layers
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2221/68377 with parts of the auxiliary support remaining in the finished device
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48 of an individual wire connector
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 2225/1035 the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3185 the coating covering also the sidewalls of the semiconductor body
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/04 : Structure, shape, material or disposition of the bonding areas prior to the connecting process
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/96 : the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

A reconstituted electronic device including: a first face and a second face; a plurality of individual chips placed perpendicular to the faces, each individual chip carrying, on one of its surfaces, at least one component, tracks, and a connection mechanism that are flush with one or other of the faces of the reconstituted electronic device; and an encapsulant that encapsulates the individual chips.

Claims

1-24. -24. (canceled)

25. A method of producing a reconstituted electronic device including, between a first face and a second face, a plurality of individual dies placed perpendicular to the faces, each individual die being bare, without packaging, tracks and connections being integrated in the die, only ends of the connections being flush, each die including a first side and a second side opposite to the first side, and including at least one component, the connections of the die being directed from the component to the first side or the second side, the method comprising:

a) positioning of one of the first and second sides of each individual die on a reference surface, so that each individual die is placed perpendicular to the reference surface;

b) encapsulating the individual dies with an encapsulant, so that the connections of each individual die are flush with one or other of the faces of the reconstituted substrate.

26. A method according to claim 25, at least one component of an individual die including tracks and connections directed from the component to the first side and to the second side of said die, and flush with, after encapsulation and if necessary thinning, the faces of the reconstituted substrate.

27. A method according to claim 25, at least two individual dies, placed perpendicular to the surface, forming between them a non zero angle.

28. A method according to claim 25, at least one individual die including a metal track forming a component and connection track.

29. A method according to claim 27, further comprising, before the encapsulating b), positioning a component, and after the encapsulating b), establishing an electrical connection between the component and the metal track.

30. A method according to claim 25, further comprising, before the positioning a), stacking at least two individual dies, the two dies then being positioned together, perpendicular to the reference surface.

31. A method according to claim 25, at least one individual die including, on one of its sides, an encapsulant.

32. A method according to claim 25, at least one individual die comprising a MEMS type component.

33. A method according to claim 25, further comprising positioning at least one component on at least one of the two faces of the reconstituted electronic device, or flush with one of the two faces.

34. A method according to claim 25, further comprising positioning frame delimiting zones in each of which one or more individual dies may be positioned.

35. A method according to claim 25, the reference surface on which each individual die is placed perpendicularly being the surface of a substrate.

36. A method according to claim 25, the reference surface on which each individual die is placed perpendicularly being an adhesive surface.

37. A method according to claim 25, further comprising forming connection tracks on the first face and/or the second face of the reconstituted electronic device.

38. A method according to claim 25, the encapsulating b) comprising thinning the reconstituted device so that the connections of each individual die are flush with one or other of the faces of the reconstituted substrate.

39. A method according to claim 25, at least one component comprising an electronic part and/or a mechanical part.

40. A reconstituted electronic device comprising:

a first face and a second face,

a plurality of bare, non encapsulated individual dies placed perpendicular to the faces, each individual die comprising at least one component, and tracks and connections that are flush with one or other of the faces of the reconstituted substrate; and

an encapsulant that encapsulates the individual dies.

41. A device according to claim 40, the at least one component comprising rerouting means and connections that are flush with the first face and the second face of the reconstituted substrate.

42. A device according to claim 40, at least two individual dies placed perpendicular to the faces forming between them a non zero angle.

43. A device according to claim 40, at least one individual die comprising a metal track forming components and rerouting means.

44. A device according to claim 42, further comprising a component and electrical connections between the component and the metal track.

45. A device according to claim 40, at least two individual dies being stacked and positioned together, perpendicular to the faces.

46. A device according to claim 40, at least one individual die comprising a MEMS type component.

47. A device according to claim 40, further comprising at least one component on at least one of the two faces of the reconstituted electronic device, or flush with one of the two faces.

48. A device according to claim 40, further comprising at least one connection on the first face and/or the second face.