DISPLAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME

• US 20100182525A1
• Filed: 06/19/2009
• Published: 07/22/2010
• Est. Priority Date: 07/21/2006
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Hong-Sick, Lee, Byeong-Jin, Choung, Jong-Hyun, Hong, Sun-Young, Kim, Bong-Kyun, Jung, Doo-Hee, Shin, Won-Suk, Youn, Joo-Ae
• Granted Patent: US 8,093,594 B2
• Time in Patent Office: Days
• US Class Current: 349/43
• CPC Class Codes: G02F 1/136231 for reducing the number of lithographic steps
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Abstract

A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the control electrode. The first electrode is on the semiconductor pattern. The second electrode is spaced apart from the first electrode on the semiconductor pattern. The contact electrode includes a contact portion and an undercut portion. The contact portion is electrically connected to the second electrode to partially expose the semiconductor pattern. The undercut portion is electrically connected to the contact portion to cover the semiconductor pattern. The pixel electrode is electrically connected to the second electrode through the contact portion of the contact electrode.

Claims

1. A display substrate, comprising:

an insulating substrate;

a thin film transistor arranged on the insulating substrate, the thin film transistor comprising a control electrode, a semiconductor pattern, a first electrode, and a second electrode spaced apart from the first electrode;

a contact electrode, the contact electrode comprising;

a contact portion electrically connected to the second electrode, the contact portion exposing a portion of the semiconductor pattern; and

an undercut portion electrically connected to the contact portion, the undercut portion extending beyond an edge of the semiconductor pattern; and

a pixel electrode electrically connected to the contact portion of the contact electrode.

2. The display substrate of claim 1, wherein the control electrode is arranged on the insulating substrate, the semiconductor pattern is arranged on the control electrode, and the first electrode and the second electrode are arranged on the semiconductor pattern.

3. The display substrate of claim 2, wherein the contact portion is recessed with respect to the undercut portion.

4. The display substrate of claim 2, wherein an edge of the contact portion and an edge of the undercut portion form a substantially straight line that forms an angle of about 5 degrees to about 60 degrees with respect to an interface between the second electrode and the contact electrode.

5. The display substrate of claim 2, wherein an upper edge of the contact electrode is substantially parallel with an interface between the second electrode and the contact electrode.

6. The display substrate of claim 2, further comprising a passivation layer interposed between the pixel electrode and an adjacent pixel electrode, the passivation layer covering the thin film transistor.

7. The display substrate of claim 2, wherein the semiconductor pattern protrudes from under the contact portion, and the pixel electrode extends from the contact electrode toward the insulating substrate along the protruded semiconductor pattern.

8. The display substrate of claim 2, further comprising:

an organic light emitting layer on the pixel electrode; and

an opposite electrode on the organic light emitting layer.

9. The display substrate of claim 2, wherein the contact electrode is integrally formed with the second electrode.

10. A liquid crystal display device, comprising:

a display substrate, the display substrate comprising;

an insulating substrate;

a thin film transistor comprising a control electrode on the insulating substrate, a semiconductor pattern on the control electrode, a first electrode on the semiconductor pattern, and a second electrode on the semiconductor pattern and spaced apart from the first electrode;

a contact electrode comprising a contact portion electrically connected to the second electrode and exposing a portion of the semiconductor pattern, and an undercut portion electrically connected to the contact portion extending beyond an edge of the semiconductor pattern; and

a pixel electrode electrically connected to the contact portion of the contact electrode;

an opposite substrate, the opposite substrate comprising;

an insulating substrate; and

a common electrode on the insulating substrate and arranged corresponding to the pixel electrode; and

a liquid crystal layer interposed between the display substrate and the opposite substrate.