ACCESS KEY GENERATING APPARATUS AND INFORMATION PROCESSING APPARATUS

• US 20100185826A1
• Filed: 01/20/2010
• Published: 07/22/2010
• Est. Priority Date: 01/21/2009
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Mitsubayashi, Hideki
• Granted Patent: US 8,312,295 B2
• Time in Patent Office: Days
• US Class Current: 711/164
• CPC Class Codes: G06F 12/1466 Key-lock mechanism

Abstract

An access key generating apparatus includes: a bit field converting unit which converts a partial bit field into a reduced bit field having a bit width shorter than a bit width of the partial bit field; an access key retaining unit which retains a plurality of access keys to control access to a memory from peripheral devices in association with each of the peripheral devices; and an indexing unit which indexes the access keys from the access key retaining unit using an index address including the reduced bit field if the conversion of the partial bit field into the reduced bit field is successful, and indexes the access keys from the access key retaining unit using an index address including the partial bit field if the conversion of the partial bit field into the reduced bit field is unsuccessful.

Claims

1. An access key generating apparatus comprising:

a bit field converting unit which converts a partial bit field, as a portion of a bit field indicating a device identifier of peripheral devices, into a reduced bit field having a bit width shorter than a bit width of the partial bit field;

an access key retaining unit which retains a plurality of access keys to control access to a memory from the peripheral devices in association with each of the peripheral devices; and

an indexing unit which indexes the access keys from the access key retaining unit using an index address including the reduced bit field if the conversion of the partial bit field into the reduced bit field is successful, and indexes the access keys from the access key retaining unit using an index address including the partial bit field if the conversion of the partial bit field into the reduced bit field is unsuccessful.

2. An access key generating apparatus comprising:

a bus number converting unit which converts a bus number, as a portion of a bit field indicating a device identifier of peripheral devices, into a reduced bus number having a bit width shorter than a bit width of the bus number;

an access key retaining unit which retains a plurality of access keys to control access to a memory from the peripheral devices in association with each of the peripheral devices; and

an indexing unit which indexes the access keys from the access key retaining unit using an index address including the reduced bus number if the conversion of the bus number into the reduced bus number is successful, and indexes the access keys from the access key retaining unit using an index address including the bus number if the conversion of the bus number into the reduced bus number is unsuccessful.

3. The access key generating apparatus according to claim 2,

wherein the device identifier includes the bus number and a device number, and

wherein the indexing unit indexes the access keys from the access key retaining unit using an index address including the reduced bus number and the device number if the conversion of the bus number into the reduced bus number is successful, and indexes the access keys from the access key retaining unit using an index address including the bus number if the conversion of the bus number into the reduced bus number is unsuccessful.

4. The access key generating apparatus according to claim 2,

wherein the device identifier includes the bus number, a device number and a function number, and

wherein the indexing unit indexes the access keys from a region of the access key retaining unit, the region being specified from the reduced bus number, the device number and the function number if the conversion of the bus number into the reduced bus number is successful, and indexes the access keys from a region of the access key retaining unit, the region being specified from the bus number and the function number if the conversion of the bus number into the reduced bus number is unsuccessful.

5. The access key generating apparatus according to claim 2,

wherein the bus number converting unit includes a plurality of entries which retains the bus number, and

wherein the bus number converting unit determines that the conversion of the bus number into the reduced bus number is successful if the bus number to be converted is retained in one of the entries and then outputs a number uniquely granted to the one entry as the reduced bus number, and determines that the conversion of the bus number into the reduced bus number is unsuccessful if the bus number to be converted is not retained in any of the entries.

6. An information processing apparatus comprising:

a bit field converting unit which converts a partial bit field, as a portion of a bit field indicating a device identifier of peripheral devices, into a reduced bit field having a bit width shorter than a bit width of the partial bit field;

an access key retaining unit which retains a plurality of access keys to control access to a memory from the peripheral devices in association with each of the peripheral devices;

an indexing unit which indexes the access keys from the access key retaining unit using an index address including the reduced bit field if the conversion of the partial bit field into the reduced bit field is successful, and indexes the access keys from the access key retaining unit using an index address including the partial bit field if the conversion of the partial bit field into the reduced bit field is unsuccessful; and

a memory access control unit which uses the indexed access keys to control access to the memory.

7. An information processing apparatus comprising:

a bus number converting unit which converts a bus number, as a portion of a bit field indicating a device identifier of peripheral devices, into a reduced bus number having a bit width shorter than a bit width of the bus number;

an access key retaining unit which retains a plurality of access keys to control access to a memory from the peripheral devices in association with each of the peripheral devices;

an indexing unit which indexes the access keys from the access key retaining unit using an index address including the reduced bus number if the conversion of the bus number into the reduced bus number is successful, and indexes the access keys from the access key retaining unit using an index address including the bus number if the conversion of the bus number into the reduced bus number is unsuccessful; and

a memory access control unit which uses the indexed access keys to control access to the memory.