Method of Forming a MEMS Topped Integrated Circuit with a Stress Relief Layer
First Claim
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1. A method of forming a semiconductor wafer comprising:
- forming a stress relief layer that touches a top surface of a passivation layer, the stress relief layer having a first maximum bulk elongation, the passivation layer being non-conductive, touching a conductive region, and having a second maximum bulk elongation; and
forming a MEMS film that touches the stress relief layer, the MEMS film having a third maximum bulk elongation, the first maximum bulk elongation being substantially greater than the second maximum bulk elongation.
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Abstract
The bow in a wafer that results from fabricating a large number of MEMS devices on the top surface of the passivation layer of the wafer so that a MEMS device is formed over each die region is reduced by forming a stress relief layer between the passivation layer and the MEMS devices.
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15 Claims
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1. A method of forming a semiconductor wafer comprising:
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forming a stress relief layer that touches a top surface of a passivation layer, the stress relief layer having a first maximum bulk elongation, the passivation layer being non-conductive, touching a conductive region, and having a second maximum bulk elongation; and forming a MEMS film that touches the stress relief layer, the MEMS film having a third maximum bulk elongation, the first maximum bulk elongation being substantially greater than the second maximum bulk elongation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification