Globally Unique Transaction Identifiers

• US 20100191890A1
• Filed: 04/05/2010
• Published: 07/29/2010
• Est. Priority Date: 04/27/2004
• Status: Active Grant

• Current Assignee: Aaron T. Spink, Herbert H.J. Hum, Robert G. Blankenship
• Original Assignee: Aaron T. Spink, Herbert H.J. Hum, Robert G. Blankenship
• Inventors: Blankenship, Robert G., Hum, Herbert H. J., Spink, Aaron T.
• Granted Patent: US 7,921,251 B2
• Time in Patent Office: Days
• US Class Current: 710/305
• CPC Class Codes: G06F 15/17381 Two dimensional, e.g. mesh, torus

Abstract

In one embodiment of the present invention, a method includes identifying a transaction from a first processor to a second processor of a system with a transaction identifier. The transaction identifier may have a value that is less than or equal to a maximum number of outstanding transactions between the two processors. In such manner, a transaction field for the transaction identifier may be limited to n bits, where the maximum number of outstanding transactions is less than or equal to 2ⁿ. In various embodiments, such a transaction identifier combined with a source identifier and a home node identifier may form a globally unique transaction identifier.

Claims

1. A method comprising:

identifying a transaction from a first processor to a second processor with an identifier having a first value, the first value less than or equal to a maximum number of outstanding transactions between the first processor and the second processor, and forwarding the transaction to the second processor with a header including the identifier; and

identifying a second transaction from the first processor to a third processor with an identifier having the same first value, and forwarding the second transaction to the third processor with a header including the identifier.

2. The method of claim 1, wherein the header of the transaction further includes a source identifier corresponding to the first processor and a home node identifier corresponding to the second processor.

3. The method of claim 2, wherein the header of the second transaction further includes the source identifier corresponding to the first processor and a home node identifier corresponding to the third processor.

4. The method of claim 2, wherein the identifier, the source identifier and the home node identifier of the header of the transaction comprise a global transaction identifier.

5. The method of claim 1, wherein a transaction field for the identifier includes n bits, where the maximum number of outstanding transactions between the first processor and the second processor is less than or equal to 2ⁿ.

6. The method of claim 1, further comprising further identifying the second transaction with a second destination identifier different than a destination identifier of the first transaction.

7. The method of claim 1, further comprising forwarding the transaction to a bridge which broadcasts the transaction to a plurality of agents coupled thereto using the identifier.

8. The method of claim 7, further comprising broadcasting the transaction to each of the plurality of agents with a destination node identifier corresponding to each of the plurality of agents.

9. An article comprising a machine-accessible storage medium including instructions that when executed cause a system to:

form a first global identifier in a source component for a first transaction between the source component and a first destination component, the first global identifier including a source field to identify the source component, a first home node field to identify an owner of an address space corresponding to the first transaction, and a transaction field to identify the first transaction with respect to the source component and the first destination component; and

form a second global identifier in the source component for a second transaction between the source component and a second destination component that is outstanding with the first transaction, the second global identifier including the same source field, a second home node field to identify an owner of an address space corresponding to the second transaction, and the same transaction field to identify the second transaction with respect to the source component and the second destination component.

10. The article of claim 9, wherein the transaction field includes n bits, where a maximum number of outstanding transactions between the source component and the first destination component is less than or equal to 2ⁿ.

11. The article of claim 9, further comprising instructions that when executed cause the system to insert the first global identifier into a header and route the header from the source component to the first destination component, wherein a value of the transaction field is reusable for at least another outstanding transaction between the source component and another destination component.

12. The article of claim 11, further comprising instructions that when executed cause the system to determine whether the value of the transaction field is less than or equal to a maximum number of outstanding transactions between the source component and the first destination component.

13. The article of claim 9, further comprising instructions that when executed cause the system to snoop the first transaction in a third component of the system.

14. The article of claim 13, further comprising instructions that when executed cause the system to respond to the snooped transaction with a response header, the response header including the first global identifier.

15. An apparatus comprising:

a first bus agent to identify a transaction from the first bus agent to a second processor with an identifier having a first value, the first value less than or equal to a maximum number of outstanding transactions between the first bus agent and the second processor, transmit a header for the transaction including the identifier, identify a second transaction between the first bus agent and a third processor with the identifier having the first value, and transmit a header for the second transaction including the identifier.

16. The apparatus of claim 15, wherein the first bus agent is to further transmit the header for the first transaction including a source identifier corresponding to the first bus agent and a destination identifier corresponding to the second processor.

17. The apparatus of claim 16, wherein the first bus agent is to further transmit the header for the second transaction including the source identifier corresponding to the first processor and a home node identifier corresponding to the third processor.

18. The apparatus of claim 15, wherein the first bus agent comprises an input/output hub and the second processor comprises a bridging agent.

19. The apparatus of claim 15, wherein the first bus agent is to modify a size of the transaction field for the identifier during operation when at least one additional processing resource is added to a system.