System and Method for Using an On-DIMM Remote Sense for Performance and Power Optimization

• US 20100191991A1
• Filed: 01/29/2009
• Published: 07/29/2010
• Est. Priority Date: 01/29/2009
• Status: Active Grant

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Wang, Kunrong, Berke, Stuart A.
• Granted Patent: US 8,205,107 B2
• Time in Patent Office: Days
• US Class Current: 713/320
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

A system includes a dual in-line memory module and a system board. The dual in-line memory module includes a plurality of dynamic random access memory devices, and a system management interface. The system management interface is configured to measure a first voltage provided to the dynamic random access memory devices, and configured to digitize the first voltage. The system board includes a test module and a voltage regulator. The test module is configured to receive the digitized first voltage via a connector pin between the dual in-line memory module and the system board, and configured to compare the first voltage to a first threshold voltage. The voltage regulator is configured to adjust a remote sense target voltage for the system management interface when the first voltage is less than the first threshold voltage.

Claims

1. A system comprising:

a dual in-line memory module including;

a plurality of dynamic random access memory devices; and

a system management interface configured to measure a first voltage provided to the dynamic random access memory devices, and configured to digitize the first voltage; and

a system board including;

a test module configured to receive the digitized first voltage via a connector pin between the dual in-line memory module and the system board, and configured to compare the first voltage to a first threshold voltage; and

a voltage regulator configured to adjust a remote sense target voltage for the system management interface when the first voltage is less than the first threshold voltage.

2. The system of claim 1 wherein the system management interface is further configured to measure a second voltage provided to the dynamic random access memory devices, and configured to digitize the second voltage.

3. The system of claim 2 wherein the test module is further configured to receive the digitized second voltage to the system board via the connector pin, and to compare the second voltage to a second threshold voltage.

4. The system of claim 3 wherein the voltage regulator is further configured to re-adjust the remote sense target voltage based on a difference between the second voltage and the second threshold voltage.

5. The system of claim 1 wherein the voltage regulator is further configured to optimize the regulated output voltage range of the voltage regulator to a lowest possible range within voltage requirements of the dynamic random access memory devices, and configured to reduce power consumption in the dynamic random access memory devices based on optimizing the regulated output voltage range of the voltage regulator.

6. The system of claim 1 wherein the voltage regulator is further configured to boost the first voltage provided to the dynamic random access memory devices.

7. The system of claim 1 wherein the connector pin is selected from a group consisting of a system management bus pin, a serial presence detect pin, and a custom remote sense pin.

8. The system of claim 1 wherein the system management interface is a system management bus device containing analog to digital conversion capability.

9. A computer readable medium comprising a plurality of instructions to manipulate a processor, the plurality of instructions comprising:

instructions to measure a first voltage provided to a dual in-line memory module;

instructions to digitize the first voltage;

instructions to send the digitized first voltage to a system board via a connector pin between the dual in-line memory module and the system board;

instructions to compare the first voltage to a first threshold voltage; and

instructions to adjust a remote sense target voltage based on a difference between the first voltage and the first threshold voltage.

10. The computer readable medium of claim 9 further comprising:

instructions to measure a second voltage provided to the dual in-line memory module;

instructions to digitize the second voltage;

instructions to send the digitized second voltage to the system board via the connector pin between the dual in-line memory module and the system board;

instructions to compare the second voltage to a second threshold voltage; and

instructions to re-adjust the remote sense target voltage based on a difference between the second voltage and the second threshold voltage.

11. The computer readable medium of claim 9 further comprising:

instructions to optimize the regulated output voltage range of the voltage regulator to a lowest possible range within voltage requirements of the device; and

instructions to reduce power consumption in the device based on optimizing the regulated output voltage range of the voltage regulator.

12. The computer readable medium of claim 9 further comprising:

instructions to boost the first voltage provided to the dynamic random access memory device.

13. The computer readable medium of claim 9 wherein the first voltage is a supply voltage provided to a dynamic random access memory.

14. The computer readable medium of claim 9 wherein the connector pin is selected from a group consisting of a system management bus pin, a serial presence detect pin, and a custom remote sense pin.

15. A computer readable medium comprising a plurality of instructions to manipulate a processor, the plurality of instructions comprising:

instructions to determine that a dual in-line memory module includes remote sense support;

instructions to measure a first voltage provided to a dynamic random access memory of the dual in-line memory module based on the dual in-line memory module including the remote sense support;

instructions to digitize the first voltage;

instructions to send the digitized first voltage to a system board via a connector pin between the dual in-line memory module and the system board;

instructions to compare the first voltage to a first threshold voltage;

instructions to determine a speed of the connecter pin;

instructions to provide information indicating a difference between the first voltage and the first threshold voltage; and

instructions to automatically adjust a remote sense target voltage based on the information indicating the difference between the first voltage and the first threshold voltage.

16. The computer readable medium of claim 15 further comprising:

instructions to measure a second voltage provided to the dual in-line memory module;

instructions to digitize the second voltage;

instructions to send the digitized second voltage to the system board via the connector pin between the dual in-line memory module and the system board;

instructions to compare the second voltage to a second threshold voltage; and

instructions to re-adjust the remote sense target voltage based on a difference between the second voltage and the second threshold voltage.

17. The computer readable medium of claim 15 further comprising:

instructions to optimize the regulated output voltage range of the voltage regulator to a lowest possible range within voltage requirements of the device; and

instructions to reduce power consumption in the device based on optimizing the regulated output voltage range of the voltage regulator.

18. The computer readable medium of claim 15 further comprising:

instructions to boost the first voltage provided to the dynamic random access memory device.

19. The computer readable medium of claim 15 wherein the connector pin is selected from a group consisting of a system management bus pin, a serial presence detect pin, and a custom remote sense pin.

20. The computer readable medium of claim 15 further comprising:

instructions to address dynamic conditions in the dual in-line memory module based on the information being real-time feedback of the first voltage.