SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100193783A1
• Filed: 01/25/2010
• Published: 08/05/2010
• Est. Priority Date: 01/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kishida, Hideyuki, Sakata, Junichiro, Yamazaki, Shunpei
• Granted Patent: US 8,436,350 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 2202/10 semiconductor
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In forming a thin film transistor, an oxide semiconductor layer is used and a cluster containing a titanium compound whose electrical conductance is higher than that of the oxide semiconductor layer is formed between the oxide semiconductor layer and a gate insulating layer.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a plurality of clusters containing titanium over the gate insulating layer;

an oxide semiconductor layer over the gate insulating layer and the plurality of clusters containing titanium; and

a source electrode layer and a drain electrode layer over the oxide semiconductor layer,

wherein the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other.

2. The semiconductor device according to claim 1, wherein the plurality of clusters contains a titanium compound whose electrical conductance is higher than electrical conductance of the oxide semiconductor layer.

3. The semiconductor device according to claim 1,

wherein the plurality of clusters containing titanium have a height of greater than or equal to 3 nm and less than or equal to 5 nm from a surface where the clusters are in contact with the gate insulating layer, and contain at least one kind of impurity element selected from niobium and tantalum.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer contains at least one selected from the group of indium, gallium, and zinc.

5. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer has a first region which is between the source electrode layer and the drain electrode layer, and

wherein a thickness of the first region is smaller than a thickness of a second region which the source and drain electrode layers overlap.

6. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer and the buffer layer contain at least one selected from the group of indium, gallium, and zinc, and

wherein a thickness of the oxide semiconductor layer is greater than or equal to 10 nm and less than or equal to 150 nm.

7. The semiconductor device according to claim 1,

wherein a channel protective layer including an inorganic material is formed over the oxide semiconductor layer.

8. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a plurality of clusters containing titanium over the gate insulating layer;

an oxide semiconductor layer over the gate insulating layer and the plurality of clusters containing titanium;

a buffer layer having n-type conductivity over the oxide semiconductor layer; and

a source electrode layer and a drain electrode layer over the buffer layer,

wherein a carrier concentration of the buffer layer is higher than a carrier concentration of the oxide semiconductor layer; and

wherein the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other via the buffer layer.

9. The semiconductor device according to claim 8, wherein the plurality of clusters contains a titanium compound whose electrical conductance is higher than electrical conductance of the oxide semiconductor layer.

10. The semiconductor device according to claim 8,

wherein the plurality of clusters containing titanium have a height of greater than or equal to 3 nm and less than or equal to 5 nm from a surface where the clusters are in contact with the gate insulating layer, and contain at least one kind of impurity element selected from niobium and tantalum.

11. The semiconductor device according to claim 8, wherein the oxide semiconductor layer contains at least one selected from the group of indium, gallium, and zinc.

12. The semiconductor device according to claim 8,

wherein the oxide semiconductor layer has a first region which is between the source electrode layer and the drain electrode layer, and

wherein a thickness of the first region is smaller than a thickness of a second region which the source and drain electrode layers overlap.

13. The semiconductor device according to claim 8,

wherein the oxide semiconductor layer and the buffer layer contain at least one selected from the group of indium, gallium, and zinc, and

wherein a thickness of the oxide semiconductor layer is greater than or equal to 10 nm and less than or equal to 150 nm.

14. The semiconductor device according to claim 8,

wherein a channel protective layer including an inorganic material is formed over the oxide semiconductor layer.

15. A method for manufacturing a semiconductor device comprising:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a plurality of clusters containing titanium over the gate insulating layer in a dispersed manner;

forming an oxide semiconductor film over the gate insulating layer and the plurality of clusters containing titanium by a sputtering method;

forming an island-like oxide semiconductor layer with an etching of the oxide semiconductor film;

forming a conductive layer over the island-like oxide semiconductor layer; and

forming an oxide semiconductor layer, a source electrode layer, and a drain electrode layer with an etching of the conductive layer.

16. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a plurality of clusters containing a metal over the gate insulating layer;

an oxide semiconductor layer over the gate insulating layer and the plurality of clusters containing the metal; and

a source electrode layer and a drain electrode layer over the oxide semiconductor layer,

wherein the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other.

17. A method for manufacturing a semiconductor device comprising:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a plurality of clusters containing a metal over the gate insulating layer in a dispersed manner;

forming an oxide semiconductor film over the gate insulating layer and the plurality of clusters containing the metal by a sputtering method;

forming an island-like oxide semiconductor layer with an etching of the oxide semiconductor film;

forming a conductive layer over the island-like oxide semiconductor layer; and

forming an oxide semiconductor layer, a source electrode layer, and a drain electrode layer with an etching of the conductive layer.