SEMICONDUCTOR DEVICE

• US 20100193785A1
• Filed: 04/06/2010
• Published: 08/05/2010
• Est. Priority Date: 06/29/2007
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KIMURA, Hajime
• Application Number:
  US12/754,936
• Publication Number:
  US 20100193785A1
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/1292 using liquid deposition, e.g. printing

Abstract

It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor.

Claims

1. A semiconductor device comprising:

a first semiconductor layer;

a first insulating layer over the first semiconductor layer;

a first conductive layer and a second conductive layer which are over the first insulating layer;

a second insulating layer over the first conductive layer and the second conductive layer; and

a second semiconductor layer over the second insulating layer,

wherein the first semiconductor layer comprises crystalline silicon, and

wherein the second semiconductor layer comprises an oxide semiconductor.

4. The semiconductor device according to claim 1,

wherein the first conductive layer and the second conductive layer comprise the same material.

7. The semiconductor device according to claim 1,

wherein the second insulating layer comprises silicon nitride.

9. The semiconductor device according to claim 1,

wherein the oxide semiconductor comprises InGaZnO.

2. A semiconductor device comprising:

a first semiconductor layer;

a first insulating layer over the first semiconductor layer;

a first conductive layer and a second conductive layer which are over the first insulating layer;

a second insulating layer over the first conductive layer and the second conductive layer;

a second semiconductor layer over the second insulating layer;

a third semiconductor layer over the second insulating layer;

a third conductive layer over the second semiconductor layer; and

a fourth conductive layer over the third semiconductor layer,

wherein the first semiconductor layer comprises crystalline silicon, and

wherein the second semiconductor layer comprises an oxide semiconductor.

5. The semiconductor device according to claim 2,

wherein the first conductive layer and the second conductive layer comprise the same material.

8. The semiconductor device according to claim 2,

wherein the second insulating layer comprises silicon nitride.

10. The semiconductor device according to claim 2,

wherein the oxide semiconductor comprises InGaZnO.

3. A semiconductor device comprising:

a top gate transistor comprising a crystalline silicon; and

a bottom gate transistor comprising an oxide semiconductor.

6. The semiconductor device according to claim 3,

wherein a gate electrode of the top gate transistor and a gate electrode of the bottom gate transistor comprise the same material.

11. The semiconductor device according to claim 3,

wherein the oxide semiconductor comprises InGaZnO.

12. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over a first semiconductor layer;

forming a conductive layer over the first insulating layer;

forming a first conductive layer and a second conductive layer by etching the conductive layer;

forming a second insulating layer over the first conductive layer and the second conductive layer; and

forming a second semiconductor layer over the second insulating layer,

wherein the first semiconductor layer comprises crystalline silicon, and

wherein the second semiconductor layer comprises an oxide semiconductor.

14. The method for manufacturing the semiconductor device according to claim 12,

wherein the step of forming the first semiconductor layer comprises the steps of:

bonding a semiconductor substrate including a fragile layer and a base substrate to each other, wherein the fragile layer is formed by ion implantation; and

separating the semiconductor substrate by heat treatment using the fragile layer as a boundary so that the first semiconductor layer remains over the base substrate.

13. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over a first semiconductor layer;

forming a first conductive layer over the first insulating layer;

forming a second conductive layer and a third conductive layer by etching the first conductive layer;

forming a second insulating layer over the second conductive layer and the third conductive layer;

forming a second semiconductor layer over the second insulating layer;

forming a third semiconductor layer and a fourth semiconductor layer by etching the second semiconductor layer;

forming a fourth conductive layer over the third semiconductor layer and the fourth semiconductor layer; and

forming a fifth conductive layer over the third semiconductor layer and a sixth conductive layer over the fourth semiconductor layer by etching the fourth conductive layer,

wherein the first semiconductor layer comprises a crystalline silicon, and

wherein the second semiconductor layer comprises an oxide semiconductor.

15. The method for manufacturing the semiconductor device according to claim 13,

wherein the step of forming the first semiconductor layer comprises the steps of:

bonding a semiconductor substrate including a fragile layer and a base substrate to each other, wherein the fragile layer is formed by ion implantation; and

separating the semiconductor substrate by heat treatment using the fragile layer as a boundary so that the first semiconductor layer remains over the base substrate.