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Method of Fabricating High Aspect Ratio Transducer Using Metal Compression Bonding

  • US 20100193884A1
  • Filed: 02/02/2009
  • Published: 08/05/2010
  • Est. Priority Date: 02/02/2009
  • Status: Abandoned Application
First Claim
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1. A method for fabricating a transducer comprising:

  • providing a handle wafer structure comprising a first substrate layer and a first patterned metal layer formed on a first surface of the first substrate layer to define a bottom capacitive sensing electrode, a first interconnect anchor structure, and a first sealing ring structure;

    providing an active wafer structure comprising a second substrate layer and a second patterned metal layer formed on a first surface of the second substrate layer to define a second interconnect anchor structure and a second sealing ring structure;

    placing the active wafer structure on the handle wafer structure so that the first and second interconnect anchor structures are aligned and so that the first and second sealing ring structures are aligned;

    bonding the handle wafer structure to the active wafer structure using metal thermocompression bonding to form a bond between the first and second interconnect anchor structures and between the first and second sealing ring structures;

    forming a third patterned layer on a second, opposite surface of the second substrate layer to define a third interconnect anchor structure and a third sealing ring structure;

    providing a cap wafer structure comprising a third substrate layer and a fourth patterned metal layer formed on a first surface of the third substrate layer to define an upper capacitive sensing electrode, a fourth interconnect anchor structure and a fourth sealing ring structure;

    placing the cap wafer structure on the active wafer structure so that the third and forth interconnect anchor structures are aligned and so that the third and fourth sealing ring structures are aligned; and

    bonding the cap wafer structure to the active wafer structure to form a bond between the third and fourth interconnect anchor structures and between the third and fourth sealing ring structures, thereby providing a hermetic enclosure surrounding at least part of the active wafer structure.

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