Semiconductor Wafer Carrier

• US 20100194014A1
• Filed: 11/13/2009
• Published: 08/05/2010
• Est. Priority Date: 02/02/2009
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Ming-Fa, Huang, Jao Sheng
• Granted Patent: US 8,820,728 B2
• Time in Patent Office: Days
• US Class Current: 269/287
• CPC Class Codes: H01L 21/67132 Apparatus for placing on an insulating substrate, e.g. tape
• CPC Class Codes: H01L 21/67346 characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/53961 with work-holder for assembly

Abstract

A system and a method for protecting semiconductor wafers is disclosed. A preferred embodiment comprises a carrier with a central region and an exterior region. The exterior region preferably has a thickness that is greater than the central region, to form a cavity in the carrier. An adhesive is preferably placed into the cavity, and a semiconductor wafer is placed onto the adhesive. The edges of the semiconductor wafer are protected by the raised exterior region as well as the displaced adhesive that at least partially fills the area between the semiconductor wafer and the exterior region of the carrier.

Claims

1. A semiconductor wafer carrier comprising:

a substrate with a raised exterior region; and

a cavity located in a central region of the substrate, the cavity configured to be connected to a semiconductor wafer with an adhesive.

2. The semiconductor wafer carrier of claim 1, wherein a difference between the first thickness and the second thickness is between about 200 μ

m and about 300 μ

m.

3. The semiconductor wafer carrier of claim 1, wherein the carrier comprises glass.

4. The semiconductor wafer carrier of claim 1, further comprising an adhesive on the central region.

5. The semiconductor wafer carrier of claim 1, wherein the adhesive at least partially covers a sidewall of the exterior region.

6. A method for protecting semiconductor wafers, the method comprising:

providing a carrier, the carrier comprising a cavity formed therein;

providing an adhesive within the cavity; and

placing a semiconductor wafer at least partially within the cavity.

7. The method of claim 6, wherein the cavity extends from a top of the carrier between about 200 μ

m and about 300 μ

m.

8. The method of claim 6, wherein a portion of the adhesive protects a sidewall of the semiconductor wafer.

9. The method of claim 8, wherein the placing a semiconductor wafer displaces the adhesive such that the adhesive and the semiconductor wafer completely fill the cavity.

10. The method of claim 6, wherein the semiconductor wafer at least partially extends away from the cavity.

11. The method of claim 6, wherein the semiconductor wafer further comprises:

a first side facing the carrier and a second side opposite the first side; and

conductive vias extending from the first side towards the second side.

12. The method of claim 6, wherein the adhesive has a thickness of about 100 μ

m.

13. The method of claim 6, wherein the adhesive is an ultra-violet glue.

14. A method for protecting semiconductor wafers, the method comprising:

providing a carrier, the carrier comprising;

a first region with a first thickness; and

a second region with a second thickness greater than the first thickness; and

attaching a semiconductor wafer to the first region using an adhesive.

15. The method of claim 14, further comprising displacing the adhesive such that the adhesive is located between the second region and the semiconductor wafer.

16. The method of claim 14, further comprising displacing the adhesive such that the adhesive and the semiconductor wafer completely fill a cavity formed by the first region and the second region.

17. The method of claim 14, further comprising thinning the semiconductor wafer to expose conductive vias located within the semiconductor wafer.

18. The method of claim 14, further comprising:

processing a side of the semiconductor wafer facing away from the carrier; and

removing the semiconductor wafer from the carrier after the semiconductor wafer has been processed.

19. The method of claim 14, further comprising irradiating the adhesive with ultra-violet radiation.

20. The method of claim 14, wherein the placing a semiconductor wafer into contact with the adhesive is performed by evenly lowering the semiconductor wafer onto the adhesive.