METHOD OF MANUFACTURING MEMORY DEVICE AND METHOD OF MANUFACTURING PHASE-CHANGE MEMORY DEVICE USING THE SAME

• US 20100197111A1
• Filed: 11/23/2009
• Published: 08/05/2010
• Est. Priority Date: 01/30/2009
• Status: Abandoned Application

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: LEE, Keum Bum, SEO, Hye Jin, LEE, Hyung Suk
• Application Number:
  US12/623,508
• Publication Number:
  US 20100197111A1
• Time in Patent Office: Days
• US Class Current: 438/430
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10N 70/011 Manufacture or treatment of multistable switching devices
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8413 adapted for resistive heating

Abstract

A method of manufacturing a memory device and a phase-change memory device is presented. The method of manufacturing the memory device includes performing Ge ion implantation on a top surface of a first layer. The method also includes performing a fast heat treatment on the ion-implanted first layer. The method also includes forming a second layer on a top of the fast heat-treated first layer.

Claims

1. A method of manufacturing a memory device in which a first layer and a second layer are stacked, the method comprising:

performing Ge ion implantation on a top surface of the first layer;

performing fast heat treatment on the ion-implanted first layer; and

forming the second layer on a top of the fast heat-treated first layer.

2. The method according to claim 1, wherein the first layer comprises a nitride-based film.

3. The method according to claim 1, wherein the Ge ion implantation is performed to provide a dose between about 1E14 to 1E16 atoms/cm² using an energy of between about 10 to 20 keV.

4. The method according to claim 1, wherein the fast heat treatment is performed at a temperature of between about 850 to 950°

C. for about 20 to 30 seconds.

5. The method according to claim 1, wherein the second layer comprises a phase-change material.

6. A method of manufacturing a memory device in which a first layer and a second layer are stacked, comprising:

forming a GeN film on a top surface of the first layer; and

forming the second layer on a top of the GeN film.

7. The method according to claim 6, wherein the first layer comprises a nitride-based film.

8. The method according to claim 6, wherein the second layer comprises a phase-change material.

9. A method of manufacturing a phase-change memory device, comprising:

forming a first interlayer dielectric film;

forming holes by etching the first interlayer dielectric film;

forming a heater on an entire surface of each of the holes;

filling the holes, in which respective heaters are formed, with a second interlayer dielectric film;

performing Ge ion implantation on top surfaces of the heaters, and on the first and second interlayer dielectric films;

performing fast heat treatment to anneal the top surfaces of the heaters and the films; and

forming a phase-change film in contact with the heaters on top of the heaters and the films.

10. The method according to claim 9, wherein the first interlayer dielectric film comprises a nitride-based film.

11. The method according to claim 9, wherein the heater comprises a stacked layer of a Ti film and a TiN film.

12. The method according to claim 9, wherein the second interlayer dielectric film comprises a nitride-based film.

13. The method according to claim 9, wherein the Ge ion implantation is performed in a dose of between about 1E14 to 1E16 atoms/cm² using an energy of between about 10 to 20 keV.

14. The method according to claim 9, wherein the fast heat processing is performed at a temperature of between about 850 to 950°

C. for about 20 to 30 seconds.

15. A method of manufacturing a phase-change memory device, comprising:

forming a first interlayer dielectric film;

forming holes by etching the first interlayer dielectric film;

forming a heater on an entire surface of each of the holes;

filling the holes, in which respective heaters are formed, with a second interlayer dielectric film;

forming a GeN film on top of the heaters and the first and second interlayer dielectric films; and

forming a phase-change film on a top of the GeN film.

16. The method according to claim 15, wherein the first interlayer dielectric film comprises a nitride-based film.

17. The method according to claim 15, wherein the heater comprises a stacked layer of a Ti film and a TiN film.

18. The method according to claim 15, wherein the second interlayer dielectric film comprises a nitride-based film.