Direct Memory Access In A Hybrid Computing Environment
First Claim
1. A method of direct memory access (‘
- DMA’
) in a hybrid computing environment, the hybrid computing environment comprising a host computer having a host computer architecture, an accelerator having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, the method comprising;
identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol;
segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments;
pinning, by the system level message passing module, the memory segments against paging; and
asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator.
1 Assignment
0 Petitions
Accused Products
Abstract
Direct memory access (‘DMA’) in a hybrid computing environment that includes a host computer, an accelerator, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, where DMA includes identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator.
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Citations
20 Claims
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1. A method of direct memory access (‘
- DMA’
) in a hybrid computing environment, the hybrid computing environment comprising a host computer having a host computer architecture, an accelerator having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, the method comprising;identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator. - View Dependent Claims (2, 3, 4, 5, 6)
- DMA’
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7. A hybrid computing environment for direct memory access (‘
- DMA’
), the hybrid computing environment comprising a host computer having a host computer architecture, an accelerator having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, the hybrid computing environment further comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions capable of;identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator. - View Dependent Claims (8, 9, 10, 11, 12)
- DMA’
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13. A computer program product for direct memory access (‘
- DMA’
) in a hybrid computing environment, the hybrid computing environment comprising a host computer having a host computer architecture, an accelerator having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, the computer program product disposed in a computer readable, signal bearing medium, the computer program product comprising computer program instructions capable of;identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
- DMA’
Specification