SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
First Claim
1. A semiconductor package, comprising:
- a chip having a first surface and a second surface opposite to the first surface, wherein the chip comprises a first pad located on the first surface;
a carrier having a third surface and a fourth surface opposite to the third surface, wherein the carrier comprises a second pads located on the third surface, and the chip is disposed on the carrier;
at least one bonding wire electrically connecting the chip to the carrier and comprising;
a first end bonded to the first pad so as to form a first bond portion; and
a second end bonded to the second pad so as to form a second bond portion, wherein the second bond portion comprises a fishtail region which comprises at least one scrubbing protrusion being integrally formed thereon; and
a molding compound sealing the chip and the bonding wire and covering the carrier.
1 Assignment
0 Petitions
Accused Products
Abstract
In a method of manufacturing a semiconductor package including a wire binding process, a first end of the bonding wire is bonded to a first pad so as to form a first bond portion. A second end of the bonding wire is bonded to a second pad, wherein an interface surface between the bonding wire and the second pad has a first connecting area. The bonded second end of the bonding wire is scrubbed so as to form a second bond portion, wherein a new interface surface between the bonding wire and the second pad has a second connecting area larger than the first connecting area. A remainder of the bonding wire is separated from the second bond portion.
85 Citations
20 Claims
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1. A semiconductor package, comprising:
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a chip having a first surface and a second surface opposite to the first surface, wherein the chip comprises a first pad located on the first surface; a carrier having a third surface and a fourth surface opposite to the third surface, wherein the carrier comprises a second pads located on the third surface, and the chip is disposed on the carrier; at least one bonding wire electrically connecting the chip to the carrier and comprising; a first end bonded to the first pad so as to form a first bond portion; and a second end bonded to the second pad so as to form a second bond portion, wherein the second bond portion comprises a fishtail region which comprises at least one scrubbing protrusion being integrally formed thereon; and a molding compound sealing the chip and the bonding wire and covering the carrier. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of manufacturing a semiconductor package, said method comprising:
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disposing a chip on a carrier, wherein the chip has a first surface and a second surface opposite to the first surface, the chip comprises a first pad located on the first surface, the carrier has a third surface and a fourth surface opposite to the third surface, and the carrier comprises a second pad located on the third surface; providing a bonding wire comprising a first end and a second end; bonding the first end of the bonding wire to the first pad so as to form a first bond portion; bonding the second end of the bonding wire to the second pad, wherein an interface surface between the second end of the bonding wire and the second pad has a first connecting area; after said bonding, scrubbing the bonded second end of the bonding wire so as to form a second bond portion, wherein a new interface surface between the second end of the bonding wire and the second pad has a second connecting area larger than the first connecting area; separating a remainder of the bonding wire from the second bond portion; and sealing the chip and the bonding wire and covering the carrier by a molding compound to obtain the package. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification