System and Method for Managing Memory in a Multiprocessor Computing Environment
First Claim
1. A system comprising:
- a plurality of processors; and
a memory communicatively coupled to each of the plurality of processors, the memory having a plurality of portions, and each portion having a marker indicative of whether such portion is associated with one of the plurality of processors;
wherein at least one of the plurality of processors is configured to maintain an associated data structure, the data structure indicative of the portions of the memory associated with the processor.
3 Assignments
0 Petitions
Accused Products
Abstract
A method for managing a memory communicatively coupled to a plurality of processors may include analyzing a data structure associated with a processor to determine if one or more portions of memory associated with the processor are sufficient to store data associated with an operation of the processor. The method may also include storing data associated with the operation in the one or more portions of the memory associated with the processor if the portions of memory associated with the processor are sufficient. If the portions of memory associated with the processor are not sufficient, the method may include determining if at least one portion of the memory is unassociated with any of the plurality of processors storing data associated with the operation in the at least one unassociated portion of the memory.
-
Citations
20 Claims
-
1. A system comprising:
-
a plurality of processors; and a memory communicatively coupled to each of the plurality of processors, the memory having a plurality of portions, and each portion having a marker indicative of whether such portion is associated with one of the plurality of processors; wherein at least one of the plurality of processors is configured to maintain an associated data structure, the data structure indicative of the portions of the memory associated with the processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A method for managing a memory communicatively coupled to a plurality of processors, comprising:
-
analyzing a data structure associated with a processor to determine if one or more portions of memory associated with the processor are sufficient to store data associated with an operation of the processor; storing data associated with the operation in the one or more portions of the memory associated with the processor if the portions of memory associated with the processor are sufficient; and if the portions of memory associated with the processor are not sufficient; determining if at least one portion of the memory is unassociated with any of the plurality of processors; and storing data associated with the operation in the at least one unassociated portion of the memory. - View Dependent Claims (10, 11, 12, 13, 14)
-
-
15. A network processor, configured to be communicatively coupled to at least one other network processor and a memory, and further configured to:
-
analyze a data structure associated with the network processor to determine if one or more portions of memory associated with the network processor are sufficient to store data associated with an operation of the network processor; store data associated with the operation in the one or more portions of the memory associated with the network processor if the portions of memory associated with the network processor are sufficient; and if the portions of memory associated with the network processor are not sufficient; determine if at least one portion of the memory is unassociated with any of the at least one other network processor; and store data associated with the operation in the at least one unassociated portion of the memory. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification