CYCLIC REDUNDANCY CHECK CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE CYCLIC REDUNDANCY CHECK CIRCUIT
First Claim
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1. A semiconductor device comprising:
- an antenna; and
a circuit portion configured to transmit a signal to the antenna and to receive a signal from the antenna, the circuit portion comprising a cyclic redundancy check circuit and a memory circuit including a transistor,wherein the transistor comprises a semiconductor layer including a channel forming region, andwherein the semiconductor layer comprises a metal oxide semiconductor.
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Abstract
An object of the present invention is to provide a CRC circuit with more simple structure and low power consumption. The CRC circuit includes a first shift register to a p-th shift register, a first EXOR to a (p−1)th EXOR, and a switching circuit. A data signal, a select signal, and an output of a last stage of the p-th shift register are inputted to the switching circuit, and the switching circuit switches a first signal or a second signal in response to the select signal to be outputted.
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Citations
9 Claims
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1. A semiconductor device comprising:
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an antenna; and a circuit portion configured to transmit a signal to the antenna and to receive a signal from the antenna, the circuit portion comprising a cyclic redundancy check circuit and a memory circuit including a transistor, wherein the transistor comprises a semiconductor layer including a channel forming region, and wherein the semiconductor layer comprises a metal oxide semiconductor. - View Dependent Claims (2, 3)
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4. A semiconductor device comprising:
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an antenna; and a circuit portion configured to transmit a signal to the antenna and to receive a signal from the antenna, the circuit portion comprising a power supply circuit, a demodulation circuit, a modulation circuit, a cyclic redundancy check circuit and a memory circuit including a transistor, wherein the transistor comprises a semiconductor layer including a channel forming region, and wherein the semiconductor layer comprises a metal oxide semiconductor. - View Dependent Claims (5, 6)
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7. A semiconductor device comprising:
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an antenna configured to receive a carrier wave; a pass-band filter configured to remove a noise from the carrier wave; a demodulation circuit configured to demodulate the carrier wave passed through the pass-band filter; a power supply circuit configured to generate a direct voltage by using the carrier wave passed through the pass-band filter; a code extraction circuit configured to extract a code of a signal of the carrier wave demodulated by the demodulation circuit; a code determination circuit configured to analyze the code from the code extraction circuit; a cyclic redundancy check circuit configured to calculate a CRC code corresponding to a transmitting data signal; a control circuit configured to add the CRC code to the transmitting data signal; a memory circuit configured to output a stored unique identifier to the control circuit, the memory circuit comprising a transistor; and a modulation circuit configured to load-modulate a carrier wave in accordance with a signal from the control circuit, wherein the transistor comprises a semiconductor layer including a channel forming region, and wherein the semiconductor layer comprises a metal oxide semiconductor. - View Dependent Claims (8, 9)
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Specification