Thin film light emitting diode

• US 20100207145A1
• Filed: 01/12/2010
• Published: 08/19/2010
• Est. Priority Date: 06/26/2002
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol
• Granted Patent: US 8,288,787 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/4918 being disposed on at least two different sides of the body, e.g. dual array
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/502 : Wavelength conversion materials
• CPC Class Codes: H01L 33/504 : Elements with two or more wavelength conversion materials
• CPC Class Codes: H01L 33/507 : the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a thin film layer over the LED chip that changes the color of the emitted light. For example, a blue LED chip can be used to produce white light. The thin film layer beneficially consists of a florescent material, such as a phosphor, and/or includes tin. The thin film layer is beneficially deposited using chemical vapor deposition.

Claims

1-39. -39. (canceled)

40. A vertical topology light emitting device, comprising:

a conductive support structure;

a semiconductor structure over the conductive support structure, wherein the semiconductor structure emits light having a first wavelength, and wherein the semiconductor structure has a first surface, a second surface and a side surface;

a first electrode between the conductive support structure and the first surface of the semiconductor structure;

a second electrode over the second surface of the semiconductor structure, wherein the second surface is opposite the first surface;

a passivation layer disposed over the semiconductor structure; and

a thin film layer over the second surface of the semiconductor structure, the thin film layer interacting with the light having a first wavelength to form light having a second wavelength.

41. The device according to claim 40, wherein the passivation layer comprises an insulative compound.

42. The device according to claim 41, wherein the insulative compound comprises at least one of Si, polymers, oxides, and nitrides.

43. The device according to claim 40, wherein the passivation layer is an electrically insulative layer.

44. The device according to claim 40, wherein the passivation layer contacts the thin film layer.

45. The device according to claim 40, wherein the passivation layer is at least partially interposed between the semiconductor structure and the thin film layer.

46. The device according to claim 40, wherein the passivation layer is disposed over the first surface of the semiconductor structure.

47. The device according to claim 40, wherein the passivation layer is disposed over the side surface of the semiconductor structure.

48. The device according to claim 40, wherein the passivation layer is disposed over the second surface of the semiconductor structure.

49. The device according to claim 40, wherein the passivation layer is disposed over the first surface and the side surface of the semiconductor structure.

50. The device according to claim 40, wherein the thin film layer comprises at least one of a fluorescent material, a tin-containing material, and a phosphor.

51. The device according to claim 40, wherein the first electrode comprises:

a reflective layer; and

an ohmic contact over the reflective layer.

52. The device according to claim 40, wherein the passivation layer has an opening corresponding to the second electrode.

53. The device according to claim 52, wherein the opening is configured to provide a location for an external electrical connection.

54. The device according to claim 40, wherein the thin film layer has an opening corresponding to the second electrode.

55. The device according to claim 54, wherein the passivation layer comprises an opening corresponding to the opening of the thin film layer.

56. The device according to claim 55, wherein the opening of the passivation layer is aligned with the opening of the thin film layer.

57. The device according to claim 40, wherein the thin film layer has a substantially uniform thickness.

58. The device according to claim 40, wherein the passivation layer is located between the thin film layer and the semiconductor structure.

59. The device according to claim 58, wherein the passivation layer electrically insulates the thin film layer from the semiconductor structure.

60. The device according to claim 40, wherein the thin film layer has a substantially uniform thickness over at least one of the second surface and the side surface of the semiconductor structure, or portions thereof.

61. The device according to claim 40, wherein the thin film layer has a substantially uniform thickness over at least one of a side surface of the first electrode, and a side surface of the second electrode, or portions thereof.

62. The device according to claim 40, wherein the thin film layer is formed over the entire surface of the passivation layer.

63. The device according to claim 40, wherein the passivation layer is formed over the second surface and the side surface of the semiconductor structure, or portions thereof.

64. The device according to claim 40, wherein the passivation layer is disposed over the side surface of the semiconductor structure and extends to at least a portion of the second surface of the semiconductor structure.

65. The device according to claim 40, wherein the passivation layer is formed over the entire exposed portion of the second surface of the semiconductor structure.

66. The device according to claim 40, wherein the passivation layer is formed over the entire portion of the second surface of the semiconductor structure not covered by the second electrode.

67. The device according to claim 40, wherein the passivation layer is formed over the entire side surface of the semiconductor structure.

68. The device according to claim 40, wherein the passivation layer has a substantially uniform thickness.

69. The device according to claim 68, wherein the substantially uniform thickness of the passivation layer is configured to enhance the uniformity of the light having a second wavelength.

70. The device according to claim 40, wherein the thickness of the thin film layer is about 10 microns or so thick.

71. The device according to claim 40, wherein the thickness of the passivation layer is about 1000 Å

.

72. The device according to claim 40, wherein at least a portion of the passivation layer prevents the thin film layer from contacting the semiconductor structure.

73. The device according to claim 40, wherein the second electrode comprises at least one of aluminum or titanium.

74. The device according to claim 40, wherein the conductive support structure comprises a metallic layer.

75. The device according to claim 74, wherein the metallic layer comprises at least one metal selected from the group consisting of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, Ti, and Al.

76. The device according to claim 40, wherein the conductive support structure comprises a metal-containing material.

77. The device according to claim 76, wherein the metal-containing material comprises titanium nitride.

78. The device according to claim 40, wherein the first electrode is multilayer.

79. The device according to claim 78, wherein at least one layer of the first electrode comprises one of Pt, Pd, Ru, Ni, Cr, and Au.

80. The device according to claim 40 further comprising:

a metal pad over the second electrode.

81. The device according to claim 80, wherein the metal pad comprises at least one of Cr and Au.

82. The device according to claim 80 further comprising:

a bonding wire electrically connected to the metal pad.

83. The device according to claim 40, wherein the passivation layer is disposed higher than the second electrode.

84. The device according to claim 40, wherein the passivation layer is disposed over at least a portion of the second electrode.

85. The device according to claim 40, wherein the passivation layer is disposed over at least a portion of the first electrode.

86. The device according to claim 40, wherein the passivation layer contacts the first electrode.

87. The device according to claim 40, wherein the passivation layer contacts the second electrode.

88. The device according to claim 40, wherein the passivation layer is disposed over at least one exposed portion of the semiconductor structure.

89. The device according to claim 40 further comprising a metal layer between the first electrode and the conductive support structure.

90. The device according to claim 89, wherein the metal layer is a metal coating.

91. The device according to claim 89, wherein the metal layer is configured to facilitate the conductive support structure to grow on the metal layer.

92. The device according to claim 89, wherein a surface of the metal layer is located over the conductive support structure.

93. The device according to claim 89, wherein the metal layer is in contact with the conductive support structure.

94. The device according to claim 40, wherein the conductive support structure comprises a metal support layer.

95. The device according to claim 40, wherein the conductive support structure is a structure comprising at least one metal.

96. The device according to claim 40, wherein the second electrode contacts the second surface of the semiconductor structure.

97. The device according to claim 40, wherein the passivation layer contacts at least a part of the second surface of the semiconductor structure.

98. The device according to claim 97, wherein the first electrode contacts the first surface of the semiconductor structure, and wherein the contact area between the first electrode and the first surface of the semiconductor structure is greater than the contact area between the passivation layer and the second surface of the semiconductor structure.

99. The device according to claim 97, wherein the passivation layer extends along the second surface of the semiconductor structure in the direction of the second electrode.

100. The vertical light-emitting device according to claim 99, wherein the passivation layer extends along the second surface of the semiconductor structure and is in contact with the second electrode.

101. The device according to claim 40, wherein the semiconductor structure comprises:

a first-type semiconductor layer over the first electrode;

a second-type semiconductor layer over the first-type semiconductor layer; and

a light emitting layer disposed between the first-type semiconductor layer and the second-type semiconductor layer.

102. The device according to claim 101, wherein the first-type semiconductor layer is a p-type GaN-based layer and the second-type semiconductor layer is an n-type GaN-based layer.

103. The device according to claim 102, wherein an area of the passivation layer covering the n-type GaN-based layer is larger than an area of the passivation layer covering the p-type GaN-based layer.

104. The device according to claim 101, wherein the passivation layer located adjacent to the second-type semiconductor layer extends to at least an upper surface of the conductive support structure.

105. The device according to claim 101, wherein a portion of the passivation layer is located adjacent to the first-type semiconductor layer and further located above at least a portion of the conductive support structure.

106. The device according to claim 40, wherein the first electrode comprises a first layer and a second layer, wherein the first layer and the second layer include different materials.

107. The device according to claim 106, wherein one of the first layer and the second layer comprises a transparent conductive material.

108. The device according to claim 40, wherein the semiconductor structure is less than about 5 microns thick.

109. The device according to claim 40, wherein the first electrode is less than 10 nm thick.

110. The device according to claim 40, wherein the conductive support structure is about 50 microns thick.

111. The device according to claim 40, wherein the device is a part of an LED package.

112. The device according to claim 111, wherein the LED package comprises a heat sink.

113. The device according to claim 40, wherein the thin film layer is an integral part of the device.

114. A vertical topology light emitting device, comprising:

a GaN-based LED chip that emits light having a first wavelength, the GaN-based LED chip comprising;

a conductive support structure,

a semiconductor structure over the conductive support structure, the semiconductor structure comprising an n-type GaN-based layer, a p-type GaN-based layer, and a light emitting layer therebetween, wherein the semiconductor structure has a first surface, a second surface and a side surface,

a first electrode between the conductive support structure and the first surface of the semiconductor structure, and

a second electrode over the second surface of the semiconductor structure, wherein the second surface is opposite the first surface;

a passivation layer disposed over at least one of the side surface and the second surface of the semiconductor structure; and

a thin film layer over the GaN-based LED chip, the thin film layer interacting with the light having a first wavelength to form light having a second wavelength.